NDLI: FPGA Implementation of Optical Flow Algorithm Based on Cost Aggregation

Content Provider	IEEE Xplore Digital Library
Author	Tanabe, Y. Maruyama, T.
Copyright Year	2014
Description	Author affiliation: Univ. of Tsukuba, Tsukuba, Japan (Tanabe, Y.; Maruyama, T.)
Abstract	The computational complexity of the optical flow estimation is very high, and many hardware systems have been proposed. In these systems, Lucas-Kanade, tensor-based, and phase-based method have been widely used. Census-transform, which is widely used in the stereo vision systems, was also implemented in several FPGA systems. In these systems, only one clock cycle is required for calculating one flow as their throughput, and their processing speed is fast enough for real-time processing of high resolution images. GPUs have also been used, and it was reported that the acceleration by FPGAs and GPUs is comparable[1][2]. The main problem in these systems is their low accuracy. The methods described above show high accuracy for the regions with high changes of brightness, but show poor results for uniform regions. This is the common problem with the stereo vision, and the approaches used in the stereo vision can be applied to the optical flow estimation. In this paper, we extend a cost aggregation algorithm[3] for the optical flow estimation, and implement it on FPGA.
Starting Page	175
Ending Page	175
File Size	194568
Page Count	1
File Format	PDF
e-ISBN	9781479951116
DOI	10.1109/FCCM.2014.57
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-05-11
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field programmable gate arrays Optical imaging Accuracy Error analysis Stereo vision Image motion analysis Computer vision FPGA optical flow real-time
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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