NDLI: Dual data pulse width modulator for wireless Simultaneous Measurement of Redox Potential and Temperature using a Single RFID Chip

Please wait, while we are loading the content...

2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS)

2013 IEEE 20th International Conference on Electronics, Circuits, and Systems (ICECS)

2012 19th IEEE International Conference on Electronics, Circuits, and Systems (ICECS 2012)

Table of contents

A low power variable GBW opamp from 60MHz to 2GHz for multi-standard receivers

Low-voltage CMOS current feedback amplifier

Optimization based on surrogate modeling for analog integrated circuits

Web-based analog design using tradeoff charts

Ultra-low voltage drain-bulk connected MOS transistors in weak and moderate inversion

Evaluating the influence of the bit error rate on the information of neural spike signals

Towards an optimized wearable neuromodulation device for urinary incontinence

Towards a closed-loop transmitter system with integrated class-D amplifier for coupling-insensitive powering of implants

Multi-application electrical stimulator architecture dedicated to waveform control by electrode-tissue impedance spectra monitoring

Selection of wavelet-bands for neural network discrimination of Parkinsonian tremor from essential tremor

Hardware-efficient matrix inversion algorithm for complex adaptive systems

Implementation of a new adaptive algorithm using fuzzy cost function and robust to impulsive noise

RADS converter: An approach to Analog to Information conversion

High-speed compressed sensing reconstruction on FPGA using OMP and AMP

A linearity enhancement technique and its application to CMOS wideband low-noise amplifiers

A 7GHz wideband self-correcting quadrature VCO

Design methodology and integration of a 1.8GHz outphasing power amplifier for mobile terminals

4.0-5.5 GHz tunable power splitter RFIC using active inductors

Design of ADPLL system for WiMAX applications in 40-nm CMOS

A soft IP core generating SoCs for the efficient stochastic simulation of large Biomolecular Networks using FPGAs

Signal processing for deep-sea observatories with reconfigurable hardware

FPGA-based path-planning of high mobility rover for future planetary missions

Hardware design and verification techniques for Giga-bit Forward-Error Correction systems on FPGAs

FPGA based cellular automata for environmental modeling

A 6.66-kHz, 940-nW, 56ppm/°C, fully on-chip PVT variation tolerant CMOS relaxation oscillator

Compact class-AB follower for wideband closed loop line drivers

A low-distortion switched-source-follower track-and-hold circuit

A 2.5-GS/s 62dB THD SiGe Track-and-Hold Amplifier with feedthrough cancellation technique

A CMOS track-and-hold circuit with beyond 30 GHz input bandwidth

All-Digital A/D converter TAD for sensor interface over wide temperature ranges

A readout circuit implementation to reduce the flicker noise in MEMS electrothermal sensors

In Pixel Implementation of autoadaptative integration time

Design and implementation of a neurocomputing ASIP for environmental monitoring in WSN

A system-proof-of-concept for remote measurement applications

FPGA implementation of simple digital signal processor

Improving palmprint identification by combining multiple classifiers and using gabor filter

Protein alignment HW/SW optimizations

Parallel scaling-free and area-time efficient CORDIC algorithm

A VLSI architecture for multiple antenna eigenvalue-based spectrum sensing

A 1-mW current reuse quadrature RF front-end for GPS L1 band in 0.18µm CMOS

A power-scalable RF CMOS receiver for 2.4 GHz Wireless Sensor Network applications

A 20 Mb/s 0.084 nJ/bit ISM-band transmitter dedicated to medical sensor networks

Analysis and characterization of mismatches in outphasing transmitter

A 60GHz class F-E power VCO with vector-modulator feedback in 65nm CMOS technology

A low-power CMOS RF power detector

Millimeter-wave high-Q active inductor in 65nm CMOS

Windowed phase comparator for an 80Gbit/s CDR

A novel multi-step C-2C DAC architecture

A CMOS 0.13µm low power front-end for GEM detectors

All-digital A/D converter TAD for high-resolution and low-power sensor/RF interface

Temperature considerations on Hall Effect sensors current-related sensitivity behaviour

A tri-mode event-based vision sensor with an embedded wireless transmitter

Improved high precision optical angle measurement system with no interference of light gradients and mismatch

A 10Gb/s inductorless push pull current mirror transimpedance amplifier

Performance evaluation for FPGA-based processing of tree-like structures

FPGA implementation of very high radix square root with prescaling

Performance evaluation of RAM-based implementation of Finite State Machines in FPGAs

FPGA-based autonomous parking of a car-like robot using Fuzzy Logic Control

A generic FPGA emulation framework

Design of a 80 Gbit/s SiGe BiCMOS fully differential input buffer for serial electrical communication

A power efficient 3-Gbits/s 1.8V PMOS-based LVDS output driver

Accessible approach to wideband matching

A generalized graphical model to specify A/D resolution from receiver front-end

Lumped-element-based single/dual-passband analog filters using signal-interference principles

Self-biased input common-mode generation for improving dynamic range and yield in inverter-based filters

A 1.25mW $3^{rd}-order$ Active-Gm-RC 250MHz-bandwidth analog filter based on power-stability optimization

Dynamic range improvement of new leap-frog filter using numerical optimization

A fourth order CMOS band pass filter for PIR sensors

Accurate estimation of analog test metrics with extreme circuits

Single pass temperature calibration of the ASIC on a general purpose ATE

A template for the construction of efficient checkers with full verification guarantees

A formal framework for testing with assertion checkers in mixed-signal simulation

Design and characterization of a QLUT in a standard CMOS process

Dual-edge triggered sense amplifier flip-flop utilizing an improved scheme to reduce area, power, and complexity

Maximum delay variation temperature-aware standard cell design

A low complexity architecture for the cell search applied to the LTE systems

Digitizing The Yuan Tseh Lee Array for Microwave Background Anisotropy by 5Gsps ADC boards

PMEPR reduction for OFCDM using SLM and PTS

Adaptive slope and threshold companding technique for PAPR reduction in OFDM systems

Selective channelization on an SDR platform for LTE-a carrier aggregation

A novel implementation of sequential output based parallel processing - orthogonal wavelet division multiplexing for DAS on SDR platform

Mixed signal SIMD cellular processor array vision chip operating at 30,000 fps

Bottom-up visual attention model based on FPGA

CMOS SPADs selection, modeling and characterization towards image sensors implementation

Embedded low-power low-cost Camera Sensor based on FPGA and its applications in mobile robots

High Dynamic Range image sensor with self adapting integration time in 3D technology

A/D conversion of the battery voltage in advanced CMOS technologies

On the design of a 2-2-0 MASH delta-sigma-pipeline modulator

Analysis of VCO based noise shaping ADCs linearized by PWM modulation

Design of an undersampled BP ΣΔ modulator using LC and time-interleaved resonators

Incremental-ΣΔ-ADCs with dynamic conversion length adaption

Interpolation filter design for hearing-aid audio class-D output stage application

Dual data pulse width modulator for wireless Simultaneous Measurement of Redox Potential and Temperature using a Single RFID Chip

The wireless system for EGG signal acquisition

A high dynamic range wideband CMOS phase angle detector for bioimpedance spectroscopy

Hardware-in-the-loop simulations of circuit architectures for the computation of exact and approximate explicit MPC control functions

VLSI Implementation of digital frequency sensors as hardware countermeasure

ASIC-in-the-loop methodology for verification of piecewise affine controllers

Reducing bit flipping problems in SRAM physical unclonable functions for chip identification

Low energy high speed reed-solomon decoder using two parallel modified evaluator Inversionless Berlekamp-Massey

High speed low complexity radix-16 Max-Log-MAP SISO decoder

High-throughput FPGA-based emulator for structured LDPC codes

Fully-parallel LUT-based (2048,1723) LDPC code decoder for FPGA

Decoder for an enhanced serial generalized bit flipping algorithm

Dynamic range improvement in $2^{nd}-order$ low-pass multibit ΣΔ modulators

Performance tuning of multi-bit continuous time ΣΔ-modulators using a switched system model

Analysis of exponentially decaying pulse shape DACs in continuous-time sigma-delta modulators

Joint estimation of filter nonidealities in continuous-time sigma-delta modulators by using an unscented Kalman filter

Discrete-time simulation of arbitrary digital/analog converter waveforms in continuous-time sigma-delta modulators

CBSC-based pipelined analog-to-digital converters: Power dissipation bound analysis

Peak power estimation using activity measured on emulator

A dual threshold voltage technique for glitch minimization

A 100-fJ/cycle sub-VT decimation filter chain in 65 nm CMOS

Low-power two's-complement multiplication based on selective activation

Efficient optimization methodology for CT functions based on a modified bayesian kriging approach

An efficient solution space for floorplan of 3D-LSI

Fast floorplanning for fixed-outline and nonrectangular regions

Lagrangian relaxation-based Discrete Gate Sizing for leakage power minimization

Finding the Hamiltonian circuits in an undirected graph using the mesh-links incidence

Improved Linearization of a high power amplifier to reduce spectral distortions near the saturation area

Bifurcation diagrams in MOS-NDR frequency divider circuits

Nonlinear harmonic analysis of multistage amplifiers

A “divide-by-odd number” direct injection CMOS LC injection-locked frequency divider

Design for linearizability of GaN based multi-carrier Doherty power amplifier through bias optimization

A 4-bit 1.5GSps 4.2mW comparator-based binary search ADC in 90nm

A 749nW 1MSps 8-bit SAR ADC at 0.5V employing boosted switches

A low-power fully differential cyclic 9-bit ADC

Design of hybrid resistive-capacitive DAC for SAR A/D converters

A 11b 5.1µW multi-slope ADC with a TDC using multi-phase clock signals

An ultra-low power li-ion battery charger for micro-power solar energy harvesting applications

A passive CMOS rectifier with leakage current control for medical implants

Design comparison of low-power rectifiers dedicated to RF energy harvesting

A process-compatible passive RFID tag's digital design for subthreshold operation

Design and analysis of multi-core homogeneous systems for energy harvesting applications

On AOP techniques for C++-based HW/SW component implementation

An RTL method for hiding clock domain crossing latency

Enhancing performance of MPSoCs through distributed resource management

Evaluation of adaptive management techniques in NoC-Based MPSoCs

A redundant wire addition method for Patchable Accelerator

Hybrid multiple constant multiplication for FPGAs

Scene-based noise reduction on a smart camera

Dynamic tree-depth adjustment for low power HEVC encoders

Fast HEVC intra mode decision based on dominant edge evaluation and tree structure dependencies

A high quality hardware friendly motion estimation algorithm focusing in HD videos

A telemetry operated vestibular prosthesis

Model-based design for selecting fingerprint recognition algorithms for embedded systems

Electrical characterization of a C-Element with LiChEn

Control and acquisition system for a High Dynamic Range CMOS Image Sensor

Long-term pulse stimulation and recording in an accelerated neuromorphic system

Real-time FPGA connected component labeling system

A 500 MHz to 6 GHz frequency synthesizer architecture for cognitive radio applications

Understanding large swing and low swing operation in DyCML gates

A fully complementary and fully differential self-biased asynchronous CMOS comparator

Channel mismatch background calibration for pipelined time interleaved ADCs

A low-power single-slope analog-to-digital converter with digital PVT calibration

SkyFlash EC project: Architecture for a 1Mbit S-Flash for space applications

A practical method for modeling amplifier nonlinearities

Performances and trends in millimeter-wave CMOS voltage controlled oscillators

A multi-valued 350nm CMOS voltage reference

Layout stress and proximity aware analog design methodology

A 1.1 V 82.3dB audio ΔΣ ADC using asynchronous SAR type quantizer

A mixed-signal front-end ASIC for EEG acquisition system

LC tank full bridge control for large coil variations

Efficient area and power multiplication part of FFT based on twiddle factor decomposition

Offset measurement method for accurate characterization of BTI-induced degradation in opamps

A study on MOSFET rectifiers with transistors operating in the weak inversion region

Return-to-One DIMS logic on 4-phase m-of-n asynchronous circuits

An ultra-low power current reused CMOS low noise amplifier for x-band space application

Utilization of multi-bit flip-flops for clock power reduction

Critical path minimized raster scan hardware architecture for computation of the Generalized Hough Transform

Flip-flop design using novel pulse generation technique

Dedicated hardware implementation of a linear congruence solver in FPGA

Analog fault diagnosis and testing by inverse problem technique

A non-coherent BPSK receiver with dual band filtering for implantable biomedical devices

A new XOR-based Content Addressable Memory architecture

A low-complexity soft-decision decoding architecture for the binary extended Golay code

Fullwave-mode analysis of shielded microstrip discontinuities on anisotropic substrates

Multiband integrated synthetic aperture radar (SAR) receiver

Low-power area-efficient delay element with a wide delay range

Skin effect modeling in time domain for RF network on chip

Stochastic differential equations approach in the analysis of MTLs with randomly varied parameters

A RF/DC current-mode detector for BiST and digital calibration of current-driven mixers

A dual-axis bulk micromachined accelerometer with low cross-sensitivity

TSV stress-aware performance and reliability analysis

FFT implementation using QCA

Analysis of coupling capacitance between TSVs and metal interconnects in 3D-ICs

The leafs scan-chain for test application time and scan power reduction

Automatic selective hardening against soft errors: A cost-based and regularity-aware approach

Transient fault analysis of CORDIC processor

A new fault-tolerant architecture for CLBs in SRAM-based FPGAs

A monitoring infrastructure for FPGA self-awareness and dynamic adaptation

Adaptive disparity map computation for stereoscopic video watermarking

Bayesian classification and artificial neural network methods for lung cancer early diagnosis

Sub-images based image hashing with non-negative factorization

A study on the HEVC performance over lossy networks

0.4V low-power 60-GHz oscillator in 65nm CMOS

Complements on phase noise analysis and design of CMOS ring oscillators

A low-power all-digital PLL architecture based on phase prediction

A dead-zone free and linearized digital PLL

Feasibility study including detector non-idealities of a 95-GHz CMOS SoC radiometer for passive imaging

Non-volatile memory circuits for FIMS and TAS writing techniques on magnetic tunnelling junctions

Validation and analysis of negative differential resistance of single-electron transistor with conductance model

Low-noise dual-channel current amplifier for DNA sensing with solid-state nanopores

CMOS Active Column Sensor for biodetection applications based on Surface Plasmon Resonance

Modeling and analysis of through silicon via: Electromagnetic and device simulation approach

CEMS-PG: A parametrized algorithm for balanced partitioning and wakeup of power gated circuits

Static read stability and write ability metrics in FinFET based SRAM considering read and write-assist circuits

Statistical leakage analysis using the deterministic modeling of cell leakage current

Uncertainty in DLL deskewing schemes

High-drive capability buffer for highly variable resistive loads

Should ΔΣ modulators used in AC motor drives be adapted to the mechanical load of the motor?

Design of a low complexity S-box based on a piecewise linear chaotic map

On current control method for single-phase AC resistance spot welding

A brief analysis of the main SPICE models of the memristor

Field Programmable switched capacitor voltage converter

A reconfigurable buck-boost switched capacitor converter with adaptive gain and discrete frequency scaling control

Design of a capacitorless low-dropout voltage regulator with fast load regulation in 130nm CMOS

Dedicated FPGA communication architecture and design for a large-scale neuromorphic system

Towards AER VITE: Building spike gate signal

Picosecond pulse generation with nonlinear transmission lines in 90-nm CMOS for mm-wave imaging applications

High level modeling of signal integrity in field bus communication with SystemC-AMS

IMOSIM: Exploration tool for Instruction Memory Organisations based on accurate cycle-level energy modelling

Power efficiency of digit level polynomial basis finite field multipliers in $GF(2^{283})$

A high-throughput ECC architecture

Energy-efficient multi-task computing on MPSoCs: A case study from a memory perspective

Second-order TDTL with initialization process

Encoding sequence design for a reduced complexity time synchronization approach for OFDM systems

Test setup for error vector magnitude measurement on WLAN transceivers

A hybrid algorithm for range estimation in RFID systems

Discrete cosine transform Type-IV-based multicarrier modulators in frequency offset channels

A CMOS pixel sensor with 4-bit column-parallel self-triggered ADC for the ILC vertex detector

A low noise high dynamic range analog front-end ASIC for the AGIPD XFEL detector

Sense/drive architecture for CMOS-MEMS accelerometers with relaxation oscillator and TDC

Low power time-of-flight 3D imager system in standard CMOS

A double-delta compensating technique for pulse-frequency modulation CMOS image sensor

Design of adaptive nano/CMOS neural architectures

Compact modeling for the transcapacitances of undoped or lightly doped nanoscale cylindrical surrounding gate MOSFETs

Estimating the starting point of conduction in nanoscale CMOS gates

Testing wireless transceivers' RF front-ends utilizing defect-oriented BIST techniques

Fast and accurate estimation of gain and unity-gain bandwidth of an OpAmp

FIR fractional Hilbert transformers with raised-cosine magnitude response

Conflict free, parallel memory access for radix-2 FFT processors

An efficient 2-D jacobian iteration modeling for image interpolation

A switching based adaptive image interpolation algorithm

A highly parallelized processor for face detection based on Haar-like features

2011 18th IEEE International Conference on Electronics, Circuits, and Systems

2010 17th IEEE International Conference on Electronics, Circuits and Systems

2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)

2008 15th IEEE International Conference on Electronics, Circuits and Systems

2007 14th IEEE International Conference on Electronics, Circuits and Systems

2006 13th IEEE International Conference on Electronics, Circuits and Systems

2005 12th IEEE International Conference on Electronics, Circuits and Systems

Proceedings of the 2004 11th IEEE International Conference on Electronics, Circuits and Systems, 2004. ICECS 2004.

10th IEEE International Conference on Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003

9th International Conference on Electronics, Circuits and Systems

ICECS 2001. 8th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.01EX483)

ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445)

ICECS'99. Proceedings of ICECS '99. 6th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.99EX357)

1998 IEEE International Conference on Electronics, Circuits and Systems. Surfing the Waves of Science and Technology (Cat. No.98EX196)

Proceedings of Third International Conference on Electronics, Circuits, and Systems

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: ndl-support@iitkgp.ac.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Mr. Siddhartha Mukherjee siddhartha@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	ndl-support@iitkgp.ac.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in