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Content Provider | IEEE Xplore Digital Library |
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Author | Chang-Woo Sohn Chang Yong Kang Myung-Dong Ko Rock-Hyun Baek Chan-Hoon Park Sung-Ho Kim Eui-Young Jeong Jeong-Soo Lee Kirsch, P. Jammy, R. Lee, J.C. Yoon-Ha Jeong |
Copyright Year | 2013 |
Description | Author affiliation: Univ. of Texas at Austin, Austin, TX, USA (Lee, J.C.) || Pohang Univ. of Sci. & Technol., Pohang, South Korea (Myung-Dong Ko; Chan-Hoon Park; Sung-Ho Kim; Eui-Young Jeong; Jeong-Soo Lee; Yoon-Ha Jeong) || SEMATECH, Albany, NY, USA (Chang-Woo Sohn; Chang Yong Kang; Rock-Hyun Baek; Kirsch, P.; Jammy, R.) |
Abstract | This work investigates the effect of $H_{fin}$ on the device and circuit characteristics, and discusses the design aspects for the SoC integration such as 6T-SRAM and 2-stage OPAMPs. Table summarizes the device- and circuit-level assessment using the FinFETs and the planar FETs. Even though the gate control of FinFETs is better than of the planar FETs, further attention should be paid to design $H_{fin}$ of the FinFETs. SoC blocks such as SRAMs require both high density and low power, so the minimum $L_{gate}$ will restrict designing $H_{fin}.$ On the other hand, the analog/RF applications prefer long $L_{gate}$ to achieve high output resistance for better performance, so we may raise the $H_{fin}$ without losing the gate control capability. Multiple $H_{fin}$ design may be good choice for the sub-22-nm SoC integration because $H_{fin}$ may affect the power, density, and the design convenience. |
Starting Page | 1 |
Ending Page | 2 |
File Size | 589107 |
Page Count | 2 |
File Format | |
ISBN | 9781467330817 |
e-ISBN | 9781467364225 |
DOI | 10.1109/VLSI-TSA.2013.6545634 |
Language | English |
Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Publisher Date | 2013-04-22 |
Publisher Place | Taiwan |
Access Restriction | Subscribed |
Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
Subject Keyword | FinFETs Logic gates System-on-chip Performance evaluation Power demand Integrated circuit modeling |
Content Type | Text |
Resource Type | Article |
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