NDLI: A virtual test-bench for analog circuit testability analysis and fault diagnosis

Content Provider	IEEE Xplore Digital Library
Author	Chakrabarty, S. Rajan, V. Ying, J. Mansjur, M. Pattipati, K. Deb, S.
Copyright Year	1998
Description	Author affiliation: Dept. of Electr. & Syst. Eng., Connecticut Univ., Storrs, CT, USA (Chakrabarty, S.)
Abstract	Are fault simulation techniques feasible and effective for fault diagnosis of analog circuits? In this paper, we investigate these issues via a software tool which can generate testability metrics and diagnostic information for analog circuits represented by SPICE descriptions. This tool, termed the virtual test bench (VTB), incorporates three different simulation-based techniques for fault detection and isolation. The first method is based on the creation of fault-test dependency models, while the other two techniques employ machine learning principles based on the concepts of: (1) Restricted Coloumb Energy (RCE) Neural Networks, and (2) Learning Vector Quantization (LVQ). Whereas the output of the first method can be used for the traditional off-line diagnosis, the RCE and LVQ models render themselves more naturally to on-line monitoring, where measurement data from various sensors is continuously available. Since it is well known that analog faults and test measurements are affected by component parameter variations, we have also addressed the issues of robustness of our fault diagnosis schemes. Specifically, we have attempted to answer the questions regarding fixing of test measurement thresholds, obtaining the minimum number of Monte-Carlo runs required to stabilize the measurements and their deviations, and the effect of different thresholding schemes on the robustness of fault models. Although fault-simulation is a powerful technique for analog circuit testability analysis, its main shortcomings are the long simulation time, large volume of data and the fidelity of simulators in accurately modeling faults. We have plotted the simulation time and volume of data required for a range of circuit sizes to provide guidance on the feasibility and efficacy of this approach.
Starting Page	337
Ending Page	352
File Size	1502761
Page Count	16
File Format	PDF
ISBN	0780344200
ISSN	10887725
DOI	10.1109/AUTEST.1998.713467
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-08-25
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit testing Analog circuits Circuit analysis Circuit faults Circuit simulation Fault diagnosis Machine learning Robustness Analytical models Software tools
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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