NDLI: Thyristor Gate Control implementation on FPGA for particle accelerator facilities

Content Provider	IEEE Xplore Digital Library
Author	Orallo, C.M. Carugati, I. Funes, M. Maestri, S. Goudard, O. Wassinger, N. Benedetti, M.
Copyright Year	2014
Description	Author affiliation: Lab. de Instrumentacion y Control, Univ. Nac. de Mar del Plata, Mar del Plata, Argentina (Orallo, C.M.; Carugati, I.; Funes, M.; Maestri, S.; Wassinger, N.; Benedetti, M.) \|\| Inst. of Energy Technol., Aalborg Univ., Aalborg, Denmark (Goudard, O.)
Abstract	This paper provides the general description, design guidelines and implementation issues of a digital Thyristor Gate Control (TGC) system developed for particle accelerator facilities. The present proposal improves the TGC performance by replacing the conventional synchronization method based on a single phase zero crossing Phase Lock Loop (PLL) with a novel three-phase synchronous method known as Variable Sampling Period Filter PLL (VSPF-PLL). The proposal is implemented in a custom board and it is tested in a 6-phase power converter under a very distorted mains.
Starting Page	48
Ending Page	53
File Size	1084279
Page Count	6
File Format	PDF
e-ISBN	9789871907861
DOI	10.1109/EAMTA.2014.6906078
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-07-24
Publisher Place	Argentina
Access Restriction	Subscribed
Rights Holder	EDIUNS
Subject Keyword	Time-frequency analysis Thyristors Field-Programmable Gate Arrays (FPGAs) Transforms Thyristor Gate Control Synchronization Phase locked loops Frequency synchronization Field programmable gate arrays Grid synchronization
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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