NDLI: Hardware architecture of MAP algorithm for turbo codes implemented in a FPGA

Content Provider	IEEE Xplore Digital Library
Author	Marin, R.R. Garcia, A.D.G. Perez, L.F.G. Villarruel, J.E.G.
Copyright Year	2005
Abstract	Turbo codes represent a very powerful channel coding technique for the next generation of mobile communications. The research is focused on the development and implementation of turbo coding-decoding algorithms in high-speed programmable platforms (DSP and FPGA) for a better performance in terms of error correction, power consumption and speed. The MAP (maximum a-posteriori probability) algorithm represents the best performance choice for turbo decoding block. The main objective of implementation is to design structures for turbo decoding near to the theoretical performance using sub-optimal architectures. In this work we present a hardware implementation of the log-domain version of the AMP algorithm (log-AMP). This version of the algorithm gives an excellent approach to the Shannon limits and allows the description of simple blocks based on arithmetic operators, like the MAX* operator.
Sponsorship	Dept. of Electron. and Mechatronics Eng. of the Universidad de las Americas Puebla (UDLAP) Center for Res. in Information and Automation Technol. (CENTIA) - (UDLAP) IEEE Sect. Puebla/Mexico
Starting Page	70
Ending Page	75
File Size	436926
Page Count	6
File Format	PDF
ISBN	0769522831
DOI	10.1109/CONIEL.2005.44
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2005-02-28
Publisher Place	Mexico
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware Turbo codes Field programmable gate arrays Decoding Channel coding Mobile communication Error correction codes Energy consumption Maximum a posteriori estimation Arithmetic Turbo Codes Logic design Log-MAP Algorithm
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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