NDLI: Built-in current self-testing scheme (BICST) for CMOS logic circuits

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Built-in current self-testing scheme (BICST) for CMOS logic circuits

Content Provider	IEEE Xplore Digital Library
Author	Qiao Tong
Copyright Year	1992
Description	Author affiliation: Dept. of Electr. Eng., Colorado State Univ., Fort Collins, CO, USA (Qiao Tong)
Abstract	A novel scheme for built-in self-testing used in current testing environment (named BICST) is presented in this paper. Test vectors are generated on chip in BICST to detect the stuck-on and bridging faults as well as stuck-at faults in a CMOS circuit. The test set generated by pseudo-exhaustive testing method can detect stuck-on and bridging faults that cause abnormal large current flow in the circuit, which will be caught by the built-in current sensors. Partitioning is done for pseudo-exhaustive testing and to obtain high resolution in current measuring. The overall structure of the BICST system is also presented.
Starting Page	304
Ending Page	308
File Size	398259
Page Count	5
File Format	PDF
ISBN	0780306236
DOI	10.1109/VTEST.1992.232770
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1992-04-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Built-in self-test CMOS logic circuits Circuit testing Circuit faults Electrical fault detection Automatic testing Fault detection Semiconductor device modeling CMOS technology Test pattern generators
Content Type	Text
Resource Type	Article

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