NDLI: A 1.5 GOPS analog CMOS array processor with integrated optical image acquisition for position encoding applications

Content Provider	IEEE Xplore Digital Library
Author	Blalock, T.N. Baumgartner, R.A. Hornak, T.
Copyright Year	1998
Description	Author affiliation: Hewlett-Packard Labs., Palo Alto, CA, USA (Blalock, T.N.)
Abstract	An analog CMOS IC performs 2-D image cross-correlations to facilitate optical navigation across low contrast surfaces, such as paper. The chip includes a 25 K frames/second 34/spl times/68 active pixel photo-receiver array for capture of optical navigation reference images. Each active pixel utilizes an embedded feedback loop to maintain adequate transient response. Low spatial frequency illumination and photocell sensitivity variations are removed from the image data with local difference computation circuits as each row of image data is transferred out of the photo-receiver array. The captured images are transferred to a 32/spl times/64 array of analog signal processing cells which perform a series of nearest-neighbor 2-D cross-correlations between a previously stored image and the most recently acquired comparison image. The computation array also includes means for moving a stored reference image within the array to improve long range encoding accuracy. The correlation results are passed to an off-chip controller for translation into relative motion data.
Starting Page	204
Ending Page	205
File Size	244786
Page Count	2
File Format	PDF
ISBN	0780347668
DOI	10.1109/VLSIC.1998.688085
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-06-11
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Optical arrays CMOS process Integrated optics Optical feedback Optical sensors Optical signal processing Navigation Analog integrated circuits CMOS analog integrated circuits CMOS integrated circuits
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Mr. Siddhartha Mukherjee siddhartha@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	ndl-support@iitkgp.ac.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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