NDLI: Super compact RFIC inductors in 0.18 /spl mu/m CMOS with copper interconnects

Content Provider	IEEE Xplore Digital Library
Author	Feng, H. Jelodin, G. Gong, K. Zhan, R. Wu, Q. Chen, C. Wang, A.
Copyright Year	2002
Description	Author affiliation: Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA (Feng, H.; Jelodin, G.; Gong, K.; Zhan, R.; Wu, Q.; Chen, C.; Wang, A.)
Abstract	Design of super compact on-chip inductors with deep-shrunk dimension of 22 /spl mu/m/spl times/23 /spl mu/m, as opposed to several hundreds /spl mu/m by several hundreds gm, is reported. Implemented in a 6-metal all-copper 0.18 /spl mu/m CMOS process, a flat inductor value of 10 nH up to 4 GHz, satisfactory to many typical RFIC applications, is achieved. The aggressive shrinkage reduces parasitic capacitance substantially and makes it realistic and cost-effective to realize single-chip RFICs in very deep sub-micron technologies. A new inductor model is proposed for accuracy. A 2.4 GHz LNA circuit with on-chip matching using the compact inductor is demonstrated.
Sponsorship	IEEE Microwave Theory and Techniques Soc. IEEE Electron Devices Soc. IEEE Solid States Circuits Soc
Starting Page	443
Ending Page	446
File Size	288613
Page Count	4
File Format	PDF
ISBN	0780372468
ISSN	15292517
DOI	10.1109/RFIC.2002.1012087
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-06-03
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Radiofrequency integrated circuits Inductors Copper Spirals Inductance Mutual coupling Integrated circuit interconnections CMOS technology Equivalent circuits Semiconductor device modeling
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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