NDLI: Session 3 overview digital signal processors and circuits [breaker page]

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2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers

2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers

2012 IEEE International Solid-State Circuits Conference

2011 IEEE International Solid-State Circuits Conference

2010 IEEE International Solid-State Circuits Conference - (ISSCC)

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers

ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

Volume 2 - 2002

Volume 1 - 2002

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

Special topic evening session - SE inductance: implications and solutions for high-speed digital circuits

Low voltage design for portable systems

Technology in the Internet age

Semiconductor memories for IT era

Ambient intelligence, the next paradigm for consumer electronics: how will it affect silicon?

Session 1 overview [breaker page]

Session 2 overview image sensors [breaker page]

A 1/1.8" 3M pixel FT-CCD with on-chip horizontal sub-sampling for DSC applications

Single-chip CMOS image sensor for mobile applications

Single chip for imaging, color segmentation, histogramming and pattern matching

A 138 dB dynamic range CMOS image sensor with new pixel architecture

A 1.5 Mpixel imager with localized hole-modulation method

A 1.0 V V/sub DD/ CMOS active pixel image sensor with complementary pixel architecture fabricated with a 0.25 /spl mu/m CMOS process

A CCD image sensor of 1 Mframes/s for continuous image capturing 103 frames

A 35 mm film format CMOS image sensor for camera-back applications

Session 3 overview digital signal processors and circuits [breaker page]

A packet-memory-integrated 44 Gb/s switching processor with a 10 Gb port and 12 Gb ports

A 4.32 GOPS 1 W general-purpose DSP with an enhanced instruction set for wireless communication

A 600 MHz VLIW DSP

A 175 mV multiply-accumulate unit using an adaptive supply voltage and body bias (ASB) architecture

A 1.3 GSample/s 10-tap full-rate variable-latency self-timed FIR filter with clocked interfaces

A GSM/GPRS mixed-signal baseband IC

A 0.55 nV//spl radic/(Hz) gigabit fully-differential CMOS preamplifier for MR/GMR read application

Session 4 overview backplane interconnects and clock multipliers [breaker page]

A 1.5 V 86 mW/ch 8-channel 622-3125 Mb/s/ch CMOS SerDes macrocell with selectable mux/demux ratio

A quad 3.125 Gb/s/channel transceiver with analog phase rotators

A 62Gb/s backplane interconnect ASIC based on 3.1Gb/s serial-link technology

An 800 Mb/s physical layer LSI with hybrid port architecture for consumer electronics networking

A 0.2-2 GHz 12 mW multiplying DLL for low-jitter clock synthesis in highly-integrated data communication chips

A multiple-crystal interface PLL with VCO realignment to reduce phase noise

A multichip on oxide of 1 Gb/s 80 dB fully-differential CMOS transimpedance amplifier for optical interconnect applications

A 45 GHz SiGe active frequency multiplier

Session 5 overview wireless networking transceivers [breaker page]

A Bluetooth radio in 0.18 /spl mu/m CMOS

A direct-conversion single-chip radio-modem for Bluetooth

Design of a low-cost integrated 0.25 /spl mu/m CMOS Bluetooth SOC in 16.5 mm/sup 2/ silicon area

A 5 GHz CMOS transceiver for IEEE 802.11a wireless LAN

A 2.4 GHz RF transceiver with digital channel-selection filter for Bluetooth

Single-chip 5.8 GHz ETC transceiver IC with PLL and demodulation circuits using SiGe HBT/CMOS

Session 6 overview SRAM and non-volatile memories [breaker page]

A 512 Mb NROM flash data storage memory with 8 MB/s data rate

A 44 mm/sup 2/ 4-bank 8-word page read 64 Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller

A 1.8 V 1 Gb NAND flash memory with 0.12 /spl mu/m STI process technology

A 125 mm/sup 2/ 1Gb NAND flash memory with 10 MB/s program throughput

A low-power ROM using charge recycling and charge sharing

The 16 kB single-cycle read access cache on a next-generation 64 b Itanium microprocessor

The on-chip 3 MB subarray based 3rd level cache on an Itanium microprocessor

Session 7 overview baseband communications [breaker page]

A unified turbo/viterbi channel decoder for 3GPP mobile wireless in 0.18 /spl mu/m CMOS

An integrated 802.11a baseband and MAC processor

A 10 Gb/s and 40 Gb/s forward-error-correction device for optical communications

IIR digital filter for delta-sigma decimation, channel selection, and square-root raised-cosine nyquist filtering

A 300 MHz quadrature direct digital synthesizer/mixer in 0.25 /spl mu/m CMOS

Direct digital frequency synthesizers using high-order polynomial approximation

Session 8 overview high speed timing [breaker page]

Jitter optimization based on phase-locked loop design parameters

A self-regulating VCO with supply sensitivity of <0.15%-delay/1%-supply

Low-power small-area /spl plusmn/7.28 ps jitter 1 GHz DLL-based clock generator

The clock distribution of the Power4 microprocessor

The core clock system on the next generation Itanium/spl trade/ microprocessor

A low-power RISC microprocessor using dual PLLs in a 0.13 /spl mu/m SOI technology with copper interconnect and low-k BEOL dielectric

Session 9 overview DRAM and ferroelectric memories [breaker page]

Memory design using one-transistor gain cell on SOI

An offset cancellation bit-line sensing scheme for low-voltage DRAM applications

A 300 MHz multi-banked eDRAM macro featuring GND sense, bit-line twisting and direct reference cell write

A hierarchy bitline boost scheme for sub-1.5 V operation and short precharge time on high density FeRAM

A quasi-matrix ferroelectric memory for future silicon storage

A 0.25 /spl mu/m 3.0 V 1T1C 32 Mb nonvolatile ferroelectric RAM with address transition detector (ATD) and current forcing latch sense amplifier (CFLSA) scheme

Session 10 overview high-speed ADCs [breaker page]

A 4 Gsample/s 8b ADC in 0.35 /spl mu/m CMOS

A 6b 1.6 Gsample/s flash ADC in 0.18 /spl mu/m CMOS using averaging termination

A 7b 450MSample/s 50mW CMOS ADC in 0.3mm/sup 2/

A 10b 120MSample/s time-interleaved analog-to-digital converter with digital background calibration

A 16 mW 30 MSample/s 10 b pipelined A/D converter using a pseudo-differential architecture

A 1.2V 10b 20MSample/s non-binary successive approximation ADC in 0.13/spl mu/m CMOS

Session 11 overview TD: RF/high-speed technologies [breaker page]

0.13 /spl mu/m 210 GHz f/sub T/ SiGe HBTs - expanding the horizons of SiGe BiCMOS

An on-chip 100 GHz-sampling rate 8-channel sampling oscilloscope with embedded sampling clock generator

High-Q FBAR filters in a wafer-level chip-scale package

Polylithic integration of a reference SAW quartz-on-silicon oscillator for single-chip radio

Superconducting bandpass /spl Delta//spl Sigma/ modulator with 2.23 GHz center frequency and 42.6 GHz sampling rate

A 43 Gb/s full-rate-clock 4:1 multiplexer in InP-based HEMT technology

A 90Gb/s 2:1 multiplexer IC in InP-based HEMT technology

Session 12 overview TD: digital directions [breaker page]

Cellular supercomputing with system-on-a-chip

Dynamic microarchitecture adaptation via co-designed virtual machines

PicoRadios for wireless sensor networks: the next challenge in ultra-low power design

Ovonic unified memory - a high-performance nonvolatile memory technology for stand-alone memory and embedded applications

Digital logic using molecular electronics

Programmable single-electron transistor logic for low-power intelligent Si LSI

Ferroelectric-based functional pass-gate for fine-grain pipelined VLSI computation

A diagonal-interconnect architecture and its application to RISC core design

Session 13 overview oversampling A/D converters [breaker page]

A 1 MHz-bandwidth second-order continuous-time quadrature bandpass sigma-delta modulator for low-IF radio receivers

A 50 mW bandpass /spl Sigma//spl Delta/ ADC with 333 kHz BW and 90 dB DR

A dual-mode 80 MHz bandpass /spl Delta//spl Sigma/ modulator for a GSM/WCDMA IF-receiver

A 1.8 V 14 b /spl Delta//spl Sigma/ A/D converter with 4MSamples/s conversion

A 3.3 mW /spl Sigma//spl Delta/ modulator for UMTS in 0.18 /spl mu/m CMOS with 70 dB dynamic range in 2 MHz bandwidth

A 64 MHz /spl Sigma//spl Delta/ ADC with 105 dB IM3 distortion using a linearized replica sampling network

A 3 V /spl Delta//spl Sigma/ receiver with sampling rate enhancement for CDMA baseband processor IC

Session 14 overview cellular RF wireless [breaker page]

A dual-band direct-conversion/VLIF transceiver for 50GSM/GSM/DCS/PCS

A single-chip quad-band (850/900/1800/1900 MHz) direct-conversion GSM/GPRS RF transceiver with integrated VCOs and fractional-N synthesizer

A highly-integrated tri-band/quad-mode SiGe BiCMOS RF-to-baseband receiver for wireless CDMA/WCDMA/AMPS applications with GPS capability

A GSM/EDGE/WCDMA modulator with on-chip D/A converter for base station

Highly-integrated SiGe BiCMOS WCDMA transmitter IC

A 0.18 /spl mu/m CMOS direct-conversion receiver front-end for UMTS

An 18 mW 1800 MHz quadrature demodulator in 0.18 /spl mu/m CMOS

A 2 GHz direct-conversion WCDMA modulator in 0.25 /spl mu/m CMOS

Session 15 overview gigabit communications [breaker page]

OC-192 transmitter in standard 0.18 /spl mu/m CMOS

OC-192 receiver in standard 0.18/spl mu/m CMOS

A 9.9 G-10.8 Gb/s rate-adaptive clock and data-recovery with no external reference clock for WDM optical fiber transmission

A 10 Gb/s CDR/DEMUX with LC delay line VCO in 0.18 /spl mu/m CMOS

A 5 Gb/s 0.25 /spl mu/m CMOS jitter-tolerant variable-interval oversampling clock/data recovery circuit

A 622 Mb/s fully-integrated optical IC with a wide range input

50 Gb/s SiGe BiCMOS 4:1 multiplexer and 1:4 demultiplexer for serial communication systems

Session 16 overview high speed I/O [breaker page]

A 100 Gb/s transceiver with GND-VDD common-mode receiver and flexible multi-channel aligner

An integrated 9-channel time digitizer with 30 ps resolution

Adaptive supply serial links with sub-1 V operation and per-pin clock recovery

1.1 V 1 GHz communications router with on-chip body bias in 150 nm CMOS

A 1 V CMOS PLL designed in high-leakage CMOS process operating at 10-700 MHz

Methodology and experimental verification for substrate noise reduction in CMOS mixed-signal ICs with synchronous digital circuits

Session 17 overview advanced RF techniques [breaker page]

A low-noise transformer-based 1.7 GHz CMOS VCO

A CMOS differential noise-shifting Colpitts VCO

A low-phase-noise low-phase-error 1.8 GHz quadrature CMOS VCO

Adaptive biasing of a 5.8 GHz CMOS oscillator

A 2.4 GHz 0.18 /spl mu/m CMOS self-biased cascode power amplifier with 23 dBm output power

A wideband linear amplitude modulator for polar transmitters based on the concept of interleaving delta modulation

Wireless 1.25 Gb/s transceiver module at 60 GHz-band

A 1 V 51GHz fully-integrated VCO in 0.12 /spl mu/m CMOS

25 GHz static frequency divider and 25 Gb/s multiplexer in 0.12 /spl mu/m CMOS

Session 18 overview converter techniques [breaker page]

A 1.5 V 2.4/2.9 mW 79/50 dB DR /spl Sigma//spl Delta/ modulator for GSM/WCDMA in a 0.13 /spl mu/m digital process

An embedded 0.8 V/480 /spl mu/W 6b/22 MHz flash ADC in 0.13 /spl mu/m digital CMOS process using nonlinear double-interpolation technique

A 0.7V MOSFET-only switched-opamp /spl Sigma//spl Delta/ modulator

A 30mW 12b 21MSample/s pipelined CMOS ADC

A self-calibrated pipeline ADC with 200MHz IF-sampling frontend

A 33mW 14b 2.5MSample/s /spl Sigma//spl Delta/ A/D converter in 0.25/spl mu/m digital CMOS

Session 19 overview DSL and wireline circuits [breaker page]

A 744mW adaptive supply full-rate ADSL CO driver

740mW ADSL line driver for central office with 75dB MTPR

A 0.5/spl mu/m CMOS low-distortion low-power line driver with embedded digital adaptive bias algorithm for integrated ADSL analog front-ends

A 1.8V 450mW VDSL 4-band analog front end IC in 0.18/spl mu/m CMOS

Analog front end for DMT-based VDSL

A low-power integrated tuner for cable-telephony applications

Session 20 overview microprocessors [breaker page]

Design of an 8-wide superscalar RISC microprocessor with simultaneous multithreading

A single-chip programmable platform based on a multithreaded processor and configurable logic clusters

Implementation of a third-generation 1.1GHz 64b microprocessor

A 0.9 V to 1.95 V dynamic voltage-scalable and frequency-scalable 32 b PowerPC processor

A 400MHz 32b embedded microprocessor core AM34-1 with 4.0GB/s cross-bar bus switch for SoC

The implementation of the next-generation 64 b Itanium/sup TM/ microprocessor

Session 21 overview TD: sensors and microsystems [breaker page]

0.25 /spl mu/m CMOS and BiCMOS single-chip direct-conversion Doppler radars for remote sensing of vital signs

Sensor arrays for fully-electronic DNA detection on CMOS

A 500 dpi capacitive-type CMOS fingerprint sensor with pixel-level adaptive image enhancement scheme

A 500 dpi 224/spl times/256-pixel single-chip fingerprint identification LSI with pixel-parallel image enhancement and rotation schemes

Micromachined e-jet for IC chip cooling

Microelectromechanical scanning devices for optical networking applications

3-D integrable optoelectronic devices for telecommunications ICs

A DC-to-250 MHz current pre-amplifier with integrated photo-diodes in standard BiCMOS, for optical-storage systems

Session 22 overview multimedia signal processing [breaker page]

A 27 MHz 11.1 mW MPEG-4 video decoder LSI for mobile application

An MPEG-4 video LSI with an error-resilient codec core based on a fast motion estimation algorithm

A 133 MHz 170 mW 10 /spl mu/A standby application processor for 3G cellular phones

A 0.8 W HDTV video processor with simultaneous decoding of two MPEG2 MP@HL streams and capable of 30 frames/s reverse playback

An 8-way VLIW embedded multimedia processor built in 7-layer metal 0.11 /spl mu/m CMOS technology

A single-chip text-to-speech synthesis device utilizing analog non-volatile multi-level flash storage

Session 23 overview analog technologies [breaker page]

A 2.5 V 57 MHz 15-tap SC bandpass interpolating filter with 320 MHz output sampling rate in 0.35 /spl mu/m CMOS

1 W 0.8 /spl mu/m BiCMOS adaptive Q-current controlled class-AB power amplifier for portable sound equipments

Analog processing circuits for a 1.1 V 270 /spl mu/A mixed-signal hearing aid chip

A 3 /spl mu/V-offset operational amplifier with 20 nV//spl radic/Hz input noise PSD at DC employing both chopping and autozeroing

A 10 /spl mu/V-offset 8 kHz bandwidth 4/sup th/-order chopped /spl Sigma//spl Delta/ A/D converter for battery management

A pseudo-CCM/DCM SIMO switching converter with freewheel switching

A method for reducing the effects of random mismatches in CMOS bandgap references

Session 24 overview RF systems [breaker page]

A fully-integrated GPS receiver front-end with 40 mW power consumption

A 27 mW GPS radio in 0.35 /spl mu/m CMOS

A CMOS broadband tuner IC

A 1 V 2 GHz CMOS up-converter using self-switching mixers

A CMOS IF sampling circuit with reduced aliasing for wireless applications

Noise cancelling in wideband CMOS LNAs

Session 25 overview processor building blacks [breaker page]

A 6.5 GHz 130 nm single-ended dynamic ALU and instruction-scheduler loop

A 25 GHz 32 b integer-execution core in 130 nm dual-V/sub T/ CMOS

A dual-issue floating-point coprocessor with SIMD architecture and fast 3D functions

A 34 word/spl times/64 b 10 R/6 W write-through self timed dual-supply-voltage register file

The high-bandwidth 256 kB 2nd level cache on an Itanium microprocessor

A fully-bypassed 6-issue integer datapath and register file on an Itanium microprocessor

Adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage

Session 26 overview MEMS and displays [breaker page]

Single-chip surface-micromachined integrated gyroscope with 50/spl deg//hour root Allan variance

A low-noise low-offset chopper-stabilized capacitive-readout amplifier for CMOS MEMS accelerometers

A gas detection system on a single CMOS chip comprising capacitive, calorimetric, and mass-sensitive microsensors

A smart CMOS wind sensor

A 1/4-inch QVGA color imaging and 3-D sensing CMOS sensor with analog frame memory

An 852/spl times/600 pixel OLED-on-silicon color microdisplay chip using CMOS sub-threshold-voltage-scaling current driver

A 30 Msample/s 12b 110 mW video analog front end for digital camera

Index To Authors

2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)

2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056)

1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278)

1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156)

1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers

1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC

Proceedings ISSCC '95 - International Solid-State Circuits Conference

Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94

1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers

1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers

1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1990 37th IEEE International Conference on Solid-State Circuits

IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers

1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1981 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1979 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1978 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1976 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1975 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1974 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1973 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1972 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1971 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1970 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1969 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1968 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1967 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1966 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1965 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1964 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1963 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1962 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1961 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1960 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1959 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1958 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1957 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1956 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1955 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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