NDLI: A 12 b 65 MSample/s CMOS ADC with 82 dB SFDR at 120 MHz

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2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers

2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers

2012 IEEE International Solid-State Circuits Conference

2011 IEEE International Solid-State Circuits Conference

2010 IEEE International Solid-State Circuits Conference - (ISSCC)

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers

ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)

2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056)

2000 IEEE International Solid-State Circuits Conference [Front Matter and Table of Contents]

21st century cars and ICs

The new millennium: wireless technologies for a truly mobile society

Atoms to applets: building systems ICs in the 21/sup st/ century

A 14b 100MSample/s 3-stage A/D converter

A 13 b 40 MSample/s CMOS pipelined folding ADC with background offset trimming

A 12 b 65 MSample/s CMOS ADC with 82 dB SFDR at 120 MHz

A 3.3 V, 12b, 50MSample/s A/D converter in 0.6 /spl mu/m CMOS with over 80 dB SFDR

An 8b 80MSample/s pipelined ADC with background calibration

A self-trimming 14b 100MSample/s CMOS DAC

A 14 b 20 MSample/s CMOS pipelined ADC

A 10 Gb/s eye opening monitor IC for decision-guided optimization of the frequency response of an optical receiver

A fully integrated SiGe receiver IC for 10 Gb/s data rate

A 0.6 W 10 Gb/s SONET/SDH bit-error-monitoring LSI

SiGe BiCMOS 3.3 V clock and data recovery circuits for 10 Gb/s serial transmission systems

A single-chip 3.5 Gb/s CMOS/SIMOX transceiver with automatic-gain-control and automatic-power-control circuits

45 GHz transimpedance 32 dB limiting amplifier and 40 Gb/s 1:4 high-sensitivity demultiplexer with decision circuit using SiGe HBTs for 40 Gb/s optical receiver

A 10 Gb/s demultiplexer IC in 0.18 /spl mu/m CMOS using current mode logic with tolerance to the threshold voltage fluctuation

A 1:4 demultiplexer for 40 Gb/s fiber-optic applications

A 1 V heterogeneous reconfigurable processor IC for baseband wireless applications

A 3.2 GOPS multiprocessor DSP for communication applications

A dynamically configurable multiformat PSK demodulator for digital HDTV using broadcasting-satellite

A digital 80 Mb/s OFDM transceiver IC for wireless LAN in the 5 GHz band

0.35 /spl mu/m CMOS COFDM receiver chip for terrestrial digital video broadcasting

A 500 Mb/s disk drive read channel in 0.25 /spl mu/m CMOS incorporating programmable noise predictive Viterbi detection and trellis coding

A 550 MSample/s 8-tap FIR digital filter for magnetic recording read channels

A configurable 5-D packet classification engine with 4Mpacket/s throughput for high-speed data networking

A 1 GHz Alpha microprocessor

A 660 MHz 64b SOI processor with Cu interconnects

A 780 MHz PowerPC/sup TM/ microprocessor with integrated L2 cache

A 1 GHz single-issue 64 b PowerPC processor

A 600 MHz 64 b PA-RISC microprocessor

760 MHz G6 S/390 microprocessor exploiting multiple Vt and copper interconnects

A GHz IA-32 architecture microprocessor implemented on 0.18 /spl mu/m technology with aluminum interconnect

A CMOS image sensor with a simple FPN-reduction technology and a hole accumulated diode

A CMOS image sensor for high-speed imaging

A 256/spl times/256 CMOS differential passive pixel imager with FPN reduction techniques

A 60 mW 10 b CMOS image sensor with column-to-column FPN reduction

A progressive scan CCD imager for DSC applications

A 1/3-inch 1.3M pixel single-layer electrode CCD with a high-frame-rate skip mode

A 1.2 V micropower CMOS active pixel image sensor for portable applications

Millipede-a highly-parallel dense scanning-probe-based data-storage system

A 10 ns read and write non-volatile memory array using a magnetic tunnel junction and FET switch in each cell

Nonvolatile RAM based on magnetic tunnel junction elements

Phase-state low electron-number drive random access memory (PLEDM)

The vertical replacement-gate (VRG) process for scalable general-purpose complementary logic

A fully-integrated zero-IF DECT transceiver

A fully integrated broadband direct-conversion receiver for DBS applications

A 2 V CMOS cellular transceiver front-end

An RF transceiver for digital wireless communication in a 25 GHz Si bipolar technology

An adaptive 2.4 GHz low-IF receiver in 0.6 /spl mu/m CMOS for wideband wireless LAN

30-100 MHz npn-only variable-gain class AB companding-based filters for 1.2 V applications

A 10.7 MHz CMOS SC radio IF filter with variable gain and a Q of 55

A 1 V CMOS switched-opamp switched-capacitor pseudo-2-path filter

A CMOS nested chopper instrumentation amplifier with 100 nV offset

A 3 GHz, 32 dB CMOS limiting amplifier for SONET OC-48 receivers

A 12 GHz 30 dB modular BiCMOS limiting amplifier for 10 Gb SONET receiver

A 622 Mb/s 4.5 pA//spl radic/Hz CMOS transimpedance amplifier [for optical receiver front-end]

A 1.3 cycle lock time, non-PLL/DLL jitter suppression clock multiplier based on direct clock cycle interpolation for "clock on demand"

A digitally controlled phase-locked loop with fast locking scheme for clock synthesis application

An eight channel 35 GSample/s CMOS timing analyzer

On-chip inductance modeling of VLSI interconnects

Active GHz clock network using distributed PLLs

Clock generation and distribution for the first IA-64 microprocessor

A CMOS ultrasound range finder microsystem

An opto-electronic 18 b/revolution absolute angle and torque sensor for automotive steering applications

Integrated circuits for particle physics experiments

Remote CMOS pressure sensor chip with wireless power and data transmission

A 3.8 inch QVGA reflective color LCD with integrated 3 b DAC driver

A CMOS analog front-end chip-set for mega pixel camcorders

An embeddable low power SIMD processor bank

A 1.8 V 3 mW 16.8 GHz frequency divider in 0.25 /spl mu/m CMOS

A 1.1 GHz CMOS fractional-N frequency synthesizer with a 3b 3rd-order /spl Delta//spl Sigma/ modulator

An integrated 2.5 GHz /spl Sigma//spl Delta/ frequency synthesizer with 5 /spl mu/s settling and 2 Mb/s closed loop modulation

A 900 MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications

A 1.4 GHz differential low-noise CMOS frequency synthesizer using a wideband PLL architecture

53 GHz static frequency divider in a Si/SiGe bipolar technology

A 79 GHz dynamic frequency divider in SiGe bipolar technology

82 GHz dynamic frequency divider in 5.5 ps ECL SiGe HBTs

CMOS circuit technology for sub-ambient temperature operation

Refrigeration technologies for sub-ambient temperature operation of computing systems

Threshold cancelling logic (TCL): a post-CMOS logic family scalable down to 0.02 /spl mu/m

Optical probing of flip-chip-packaged microprocessors

Non-invasive timing analysis of IBM G6 microprocessor L1 cache using backside time-resolved hot electron luminescence

Reduced substrate noise digital design for improving embedded analog performance

Accurate in-situ measurement of peak noise and signal delay induced by interconnect coupling

A 60 MHz 240 mW MPEG-4 video-phone LSI with 16 Mb embedded DRAM

A 30 frames/s megapixel real-time CMOS image processor

A parallel vector quantization processor eliminating redundant calculations for real-time motion picture compression

A 200 MHz 0.25 W packet audio terminal processor for voice-over-internet protocol applications

A 720 /spl mu/W 50 MOPs 1V DSP for a hearing aid chip set

A 4-way VLIW embedded multimedia processor

A 7.1 GB/s low-power 3D rendering engine in 2D array-embedded memory logic CMOS

Heterogeneous multi-processor for the management of real-time video and graphics streams

Dynamic termination output driver for a 600 MHz microprocessor

Embedded low-cost 1.2 Gb/s inter-IC serial data link in 0.35 /spl mu/m CMOS

A 90 mW 4 Gb/s equalized I/O circuit with input offset cancellation

A 1.25 Gb/s CMOS receiver core with plesiochronous clocking capability for asynchronous burst data acquisition

A 2.4 Gb/s/pin simultaneous bidirectional parallel link with per pin skew compensation

A scalable 32 Gb/s parallel data transceiver with on-chip timing calibration circuits

A 20 Gb/s CMOS multi-channel transmitter and receiver chip set for ultra-high resolution digital display

A 16 Mb 400 MHz loadless CMOS four-transistor SRAM macro

An 833 MHz 1.5 W 18 Mb CMOS SRAM with 1.67 Gb/s/pin

The future of ferroelectric memories

A 128 kb FeRAM macro for a contact/contactless smart card microcontroller

A 0.4 /spl mu/m 3.3 V 1T1C 4 Mb nonvolatile ferroelectric RAM with fixed bit-line reference voltage scheme and data protection circuit

A 40 mm/sup 2/ 3 V 50 MHz 64 Mb 4-level cell NOR-type flash memory

A channel-erasing 1.8 V-only 32 Mb NOR flash EEPROM with a bit-line direct-sensing scheme

A 2nd generation 440 ps SOI 64 b adder

Conditional-capture flip-flop technique for statistical power reduction

Asynchronous interlocked pipelined CMOS circuits operating at 3.3-4.5 GHz

A dynamic voltage scaled microprocessor system

Clock-powered CMOS VLSI graphics processor for embedded display controller application

A variable-frequency parallel I/O interface with adaptive power supply regulation

A CMOS HDSL2 analog front-end

A broadband high-voltage SLIC for a splitter- and transformer-less combined ADSL-Lite/POTS linecard

A gigabit transceiver chip set for UTP CAT-6 cables in digital CMOS technology

A 3 V low-power 0.25 /spl mu/m CMOS 100 Mb/s receiver for Fast Ethernet

A mixed-signal DFE/FFE receiver for 100Base-TX applications

CMOS 125 MHz fiber/TP media converter with auto offset cancellation post amplifier and pre-emphasis LED driver

A combined 10/125 Mbaud twisted-pair line driver with programmable performance/power features

Chip-package co-design of a 5 GHz RF front-end for WLAN

5 GHz CMOS radio transceiver front-end chipset

A 2 V 5.1-5.8 GHz image-reject receiver with wide dynamic range

Low-cost 60 GHz-band antenna-integrated transmitter/receiver modules utilizing multi-layer low-temperature co-fired ceramic technology

76 Hz automotive radar chipset with stabilizing method for face-down high-frequency circuits

Wireless interconnection in a CMOS IC with integrated antennas

Electromagnetically shielded high-Q CMOS-compatible copper inductors

A DC measurement IC with 130 nV/sub pp/ noise in 10 Hz

A 2.5 MSample/s multi-bit /spl Delta//spl Sigma/ CMOS ADC with 95 dB SNR

A 90 dB SNR, 2.5 MHz output rate ADC using cascaded multibit /spl Delta//spl Sigma/ modulation at 8x oversampling ratio

A 10.7 MHz IF-to-baseband /spl Sigma//spl Delta/ A/D conversion system for AM/FM radio receivers

A two-path bandpass /spl Sigma//spl Delta/ modulator with extended noise shaping

A 120 dB multi-bit SC audio DAC with second-order noise shaping

A mixed digital-analog 16 b microcontroller with 0.5 Mb flash memory, on-chip power supply, physical network interface, and 40 V I/O for automotive single-chip mechatronics

A 1 GHz portable digital delay-locked loop with infinite phase capture ranges

A 330 MHz low-jitter and fast-locking direct skew compensation DLL

A 23 mW 256-tap 8 MSample/s QPSK matched filter for DS-CDMA cellular telephony using recycling integrator correlators

An analog 0.25 /spl mu/m BiCMOS tailbiting MAP decoder

A 550 Mb/s GMR read/write amplifier using 0.5 /spl mu/m 5 V CMOS process

A micropower programmable DSP powered using a MEMS-based vibration-to-electric energy converter

Two phase non-overlapping clock adiabatic differential cascode voltage switch logic (ADCVSL)

On-chip multi-GHz clocking with transmission lines

Delay variability: sources, impacts and trends

DS-CDMA wired bus with simple interconnection topology for parallel processing system LSIs

IC identification circuit using device mismatch

Improved mixer IIP2 through dynamic matching

0.5-1 V 2 GHz RF front-end circuits in CMOS/SIMOX

Ultra-wide dynamic range 1.75 dB noise-figure, 900 MHz CMOS LNA

A 900 MHz SOI fully-integrated RF power amplifier for wireless transceivers

3 to 5 GHz quadrature modulator and demodulator using a wideband frequency-doubling phase shifter

A low-power low-noise accurate linear-in-dB variable gain amplifier with 500 MHz bandwidth

Integrated adaptive channel selectivity for FM receivers

An 8 ns random cycle embedded RAM macro with dual-port interleaved DRAM architecture (D/sup 2/ RAM)

A 56.8 GB/s 0.18 /spl mu/m embedded DRAM macro with dual port sense amplifier for 3D graphics controller

1 GHz fully pipelined 3.7 ns address access time 8 k/spl times/1024 embedded DRAM macro

A 16 MB cache DRAM LSI with internal 35.8 GB/s memory bandwidth for simultaneous read and write operation

New architecture for cost-efficient high-performance multiple-bank RDRAM

A 0.18 /spl mu/m 256 Mb DDR-SDRAM with low-cost post-mold-tuning method for DLL replica

A 500 Mb/s/pin quadruple data rate SDRAM interface using a skew cancellation technique

Antifuse EPROM circuit for field programmable DRAM

UltraSPARC-III: a 3rd generation 64 b SPARC microprocessor

Implementation of a 3rd-generation SPARC V9 64 b microprocessor

A 450 MHz 64 b RISC processor using multiple threshold voltage CMOS

A 200 MHz digital communications processor

A 1 GIPS 1 W single-chip tightly-coupled four-way multiprocessor with architecture support for multiple control flow execution

A 1000-MIPS/W microprocessor using speed adaptive threshold-voltage CMOS with forward bias

The first IA-64 microprocessor: a design for highly-parallel execution

A 700M Sample/s 6 b read channel A/D converter with 7 b servo mode

A 6 b 800 MSample/s CMOS A/D converter

A low-phase-noise CMOS LC oscillator with a ring structure

An integrated low-phase-noise voltage controlled oscillator for base station applications

A 3 V mixed-signal baseband processor IC for IS-95

A differential 160 MHz self-terminating adaptive CMOS line driver

An on-chip voltage regulator using switched decoupling capacitors

An on-chip USB-powered three-phase up/down DC/DC converter in a standard 3.3 V CMOS process

A CMOS bandgap reference without resistors

Index of authors

1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278)

1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156)

1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers

1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC

Proceedings ISSCC '95 - International Solid-State Circuits Conference

Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94

1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers

1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers

1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1990 37th IEEE International Conference on Solid-State Circuits

IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers

1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1981 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1979 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1978 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1976 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1975 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1974 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1973 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1972 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1971 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1970 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1969 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1968 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1967 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1966 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1965 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1964 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1963 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1962 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1961 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1960 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1959 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1958 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1957 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1956 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1955 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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