NDLI: 3D integration of high mobility InGaAs nFETs and Ge pFETs for ultra low power and high performance CMOS

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2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

Conference committee

List of presentations

General chairman's welcome

Introduction and history [of the IEEE S3S Conference]

Fully-depleted-silicon-on-insulator from R&D concept to industrial reality

Practical process flows for monolithic 3D

3D integration of high mobility InGaAs nFETs and Ge pFETs for ultra low power and high performance CMOS

3D-enabled heterogeneous integrated circuits

Three-dimensional wafer stacking using Cu TSV integrated with 45nm high performance SOI-CMOS embedded DRAM technology

3D hetero-integration technology with backside TSV and reliability challenges

Fine grained 3D cache architecture using high density TSVs

SOI lateral bipolar transistor with drive current >3mA/μm

Three-dimensional integrated circuits with NFET and PFET on separate layers fabricated by low temperature Au/SiO2 hybrid bonding

Aggressively scaled strained silicon directly on insulator (SSDOI) FinFETs

Fin width scaling for improved short channel control and performance in aggressively scaled channel length SOI finFETs

Influence of substrate rotation on the low frequency noise of strained triple-gate MuGFETs

Comparative simulation of TriGate and FinFET on SOI: Evaluating a multiple threshold voltage strategy on triple gate devices

Enabling Sub-nW RF circuits through subthreshold leakage management

280mV sense amplifier designed in 28nm UTBB FD-SOI technology using back-biasing control

Low power false positive tolerant event detector for seismic sensors

Enabling energy efficient protocol processing for passive RFID sensors using sub/near-threshold circuit

Opportunities in 3D substrate bonding

Direct point-contact characterization of Bias instability on bare SOI wafers

Radiation effects in advanced SOI devices: New insights into Total Ionizing Dose and Single-Event Effects

Hold time closure for subthreshold circuits using a two-phase, latch based timing method

Ultra low power 2-tier 3D stacked sub-threshold H.264 intra frame encoder

Is high resistivity SOI wafer the substrate solution for RF System-on-Chip?

Envelope Tracking power amplifier optimization for mobile applications

Foundry SOI technology for wireless front end modules

MEMS Solutions in RF applications

Simulation of statistical variability in nanometer scale CMOS devices

A trench isolated thick SOI process as platform for various electrical and optical integrated devices

Evaluation of transient voltage collapse write-assist for GeOI and SOI FinFET SRAM cells

Robust clock tree using single-well cells for multi-VT 28nm UTBB FD-SOI digital circuits

The first SOTB implementation of Flex Power FPGA

DTMOS power switch in 28 nm UTBB FD-SOI technology

High temperature and radiation hard CMOS SOI sub-threshold voltage reference

Dual-threshold design of sub-threshold circuits

Performance characteristics of 14 nm near threshold MCML circuits

UTBB FDSOI scaling enablers for the 10nm node

Matching behavior of analog FDSOI n-MOS-transistors under large backgate voltage swing operating conditions

Performance analysis of multi-V design solutions in 28nm UTBB FD-SOI technology

Self-aligned contacts for 10nm FDSOI Node: From device to circuit evaluation

Possibility of SOI based super steep subthreshold slope MOSFET for ultra low voltage application

Evidence of mobility enhancement due to back biasing in UTBOX FDSOI high-k metal gate technology

Parallelism and pipelining in ultra low voltage digital circuits

Scaling perspectives of ULV microcontroller cores to 28nm UTBB FDSOI CMOS

Delay Insensitive logic with increased fault tolerance and optimized for subthreshold operation

Design of a robust and ultra-low-voltage pulse-triggered flip-flop in 28nm UTBB-FDSOI technology

A sub-threshold halo implanted MOS implementation of Izhikevich neuron model

Gate length scaling of high-k vertical MOSFET toward 20nm CMOS technology and beyond

Thermal stability of ultra-thin InGaAs-on-insulator substrates

Thermal considerations for monolithic integration of three-dimensional integrated circuits

Concurrent design analysis of A 8500V ESD-protected SP10T switch in SOI CMOS

NW-TFET analog performance for different Ge source compositions

Dual threshold voltage adder for robust sub-Vt operation in 65nm technology

Analysis of Vth flexibility in ultrathin-BOX SOI FinFETs

An ultra-low-power first-order asynchronous sigma-delta modulator for biomedical applications

A Double-Feedback 8T SRAM bitcell for low-voltage low-leakage operation

A low power and radiation-tolerant FPGA implemented in FD SOI process

Demonstration of gate-all-around FETs based on suspended CVD-grown silicon nanowires

Experimental comparative study between the diamond MOSFET and its conventional counterpart in high temperatures environment

Harmonic distortion analysis of short channel junctionless nanowire transistors operating as amplifiers

The activation energy dependence on the electric field in UTBOX SOI FBRAM devices

Germanium on insulator (GOI) structure locally grown on silicon using hetero epitaxial lateral overgrowth

Charge trapping type FinFET flash memory with Al blocking layer

GaP source-drain SOI 1T-DRAM: Solving the key technological challenges

Suppression of self-heating effect employing bulk vertical-channel bipolar junction transistor (BJT) type capacitorless 1T-DRAM cell

An ultra-fast floating-body/gate cell for embedded DRAM

V=0.4 V LSIs are the real with silicon-on-thin-buried-oxide (SOTB) — How is the application with "Perpetuum-Mobile" micro-controller with SOTB?

An ultra low energy 9T half-select-free subthreshold SRAM bitcell

0.42-to-1.20V read assist circuit for SRAMs in CMOS 65nm

A 13T radiation hardened SRAM bitcell for low-voltage operation

SRAM row decoder design for wide voltage range in 28nm UTBB-FDSOI

Ultra-thin body MOS device technologies using high mobility channel materials

SOI and Engineered-SOI, ideal platforms for building MEMS

New observation on gate-induced drain leakage in Silicon nanowire transistors with Epi-Free CMOS compatible technology on SOI substrate

Back bias influence on analog performance of pTFET

Global variability of UTBB MOSFET in subthreshold

A 44μW/10MHz minimum power operation of 50K logic gate using 65nm SOTB devices with back gate control

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2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573)

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3D integration of high mobility InGaAs nFETs and Ge pFETs for ultra low power and high performance CMOS

Content Provider	IEEE Xplore Digital Library
Author	Irisawa, T. Oda, M. Kamimuta, Y. Moriyama, Y. Ikeda, K. Mieda, E. Jevasuwan, W. Maeda, T. Ichikawa, O. Osada, T. Hata, M. Tezuka, T.
Copyright Year	2013
Description	Author affiliation: Collaborative Res. Team Green Nanoelectron. Center (GNC), AIST, Tsukuba, Japan (Irisawa, T.; Oda, M.; Kamimuta, Y.; Moriyama, Y.; Ikeda, K.; Mieda, E.; Jevasuwan, W.; Maeda, T.; Tezuka, T.) \|\| Sumitomo Chem. Co. Ltd., Tsukuba, Japan (Ichikawa, O.; Osada, T.; Hata, M.)
Abstract	InGaAs/Ge stacked 3D CMOS inverters have been successfully demonstrated down to $V_{dd}$ = 0.2 V. The negligible degradation of the top and the bottom device characteristics indicates high technical feasibility of the InGaAs/Ge stacked 3D integration for ultra low-power and high performance CMOS.
Sponsorship	IEEE Electron Devices Soc.
Starting Page	1
Ending Page	2
File Size	1050337
Page Count	2
File Format	PDF
ISBN	9781479913619
DOI	10.1109/S3S.2013.6716513
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-10-07
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Indium gallium arsenide MOSFET CMOS integrated circuits Three-dimensional displays Logic gates MOSFET circuits Fabrication
Content Type	Text
Resource Type	Article

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