NDLI: Low-Voltage Low-Power High-Temperature SOI CMOS Rectifiers

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2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

2013 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)

2012 IEEE International SOI Conference (SOI)

IEEE 2011 International SOI Conference

2010 IEEE International SOI Conference (SOI)

2009 IEEE International SOI Conference

2008 IEEE International SOI Conference

2007 IEEE International SOI Conference

2006 IEEE international SOI Conferencee Proceedings

2006 IEEE International SOI Conference

Introduction and History

Conference committee

2006 IEEE International SOI Conference

Table of contents

Plenary Session

The MOSFET Revisited: Device Physics and Modeling at the Nanoscale

A Low Power and High Performance SOI SRAM Circuit Design with Improved Cell Stability

IC's Performance Improvement and 3D Integration by Layer Transfer Technologies

High Performance and Low Power Devices

High Performance and Low Power Devices

Fully Depleted SOI Technology for Ultra Low Power Digital and RF Applications

Ultra-Thin Fully Depleted SOI Devices with Thin BOX, Ground Plane and Strained Liner Booster

Optimization of Dual-ESL Stressor Geometry Effects for High Performance 65nm SOI Transistors

Performance Enhancement via Laser Anneal-Based RS/D Reduction in PD/SOICMOS

Performance Enhancement for Ultra Thin Body MOSFETs Using Ultra Thin Spacer

Single Metal Gate with Dual Work Functions for FD-SOI and UTB Double Gate Technologies

SOI Materials and Characterization

SOI Materials and Characterization

Performance of SOI devices transferred onto passivated HR SOI substrates using a layer transfer technique

Optical and Electrical Characterization of Thin Germanium-On-Insulator (GeOI) Implanted Layers

Defect Analysis of Electric and Photonic Double Layer Substrate made by SIMOX 3D sculpting

Low Frequency Noise Performance in TiN/HfO2 Fully Depleted SOI nMOSFET

I/O Architecture For Improved ESD Protection In Deep Sub-Micron SOI Technologies

High Temperature Oxygen Out-Diffusion from the Interfacial SiOx Bond Layer in Direct Silicon Bonded (DSB) Substrates

Novel Silicide-Cladded Uniaxially-Strained Thin-Body SOI CMOS FETs Featuring Floating Body Modulation Induced by Hf-based Gate Dielectric

Post-RTA Effect on Electrical Characteristics of Nano-scale Strained Si Grown on SiGe-on-Insulator n-MOSFET

Novel Process Combining SOI and Strained Circuitry

Wafer bonding for Planar Double Gate Technology

Evaluation of SOI substrates with local or global strain by means ofin-plane XRD measurement

The investigation of thin-film SOI substrate for the growth of III-nitride

Defect-Free Epitaxial Lateral Overgrowth (ELO) Technique For Future Generation Low Power CMOSFETs

Back-Channel, Depletion-Assisted, Gate-Induced Floating Body Effects in Cryogenically-Operated, 90 nm Strained Si SOI MOSFETs

Reducing Back Channel Threshold Voltage Shifts of Partially Depleted SOI by Si Ion Implantation

Controlled Single-Electron Effects in Multiple-Gate SOI MOSFETs near Room Temperature

Low-Voltage Low-Power High-Temperature SOI CMOS Rectifiers

High Q and High Tuning Range FinFET Based Varactors for Low Cost SoC Integration

Compact Tunable Current-Mode Analog Circuits Using DGMOSFETs

Four-Gate Transistor Voltage-Controlled Negative Differential Resistance Device and Related Circuit Applications

Low Temperature Analog Operation of Triple-Gate FinFETs with HfO2 Dielectrics and TiN Gate Material

Double-Gate FET Technology for RF Applications: Device Characteristics and Low Noise Amplifier Design

Mobility behavior in narrow Ω-gateFETs devices

Quantum corrected Ensemble Monte Carlo simulation of UTB-DGSOI. Contribution of Volume Inversion and Inter-Subband Modulation effects

A Dynamical Power-Management Demonstration Using Four-Terminal Separated-Gate FinFETs

Speed performances of thin-film lateral SOI PIN photodiodes up to tens of GHz

A Nanoscale bSPIFET to Overcome CMOS Scaling

Device Physics and Modeling

Device Physics and Modeling

Saturation Drain Current analytical modeling of Single Gate Fully Depleted SOI or SON MOSFETs in the Quasi Ballistic Regime of Transport

Insights on Carrier Mobilities and Transport in Contemporary DG FinFETs

Optimizing History Effects in 65nm PD-SOI CMOS

Suppresion of Floating Body Effect in Low Leakage FD-SOI with Fluorine Implantation Technology

A dynamic self heating model for power SOI Lateral Insulated Gate Bipolar Transistors

Impact of FD-SOI on Deep-Sub-100-nm CMOS LSIs -A View of Memory Designers-

FinFET SRAM with Enhanced Read / Write Margins

A New Mechanism of Heavy Ion Induced Upset in SOI SRAMs

Novel Capacitor-Less 1T-DRAM Using MSD Effect

Soft Error Performance of Z-RAM Floating Body Memory

Optimization of Nanoscale Thyristors on SOI for High-Performance High-Density Memories

Circuit Techniques and Applications

Circuit Techniques and Applications

An SOI-BiCDMOS Chipset for Automotive Electronically Controlled Brake System

Adaptive-Vth CMOS/SOI DC-DC Converter Scheme for 0.3-V Operation

State of the art 200 GHz passive components and circuits integrated in advanced thin SOI CMOS technology on High Resistivity substrate

13GHz On-chip Oscilloscope with Sub-picosecond Resolution Using Asynchronous Clock

Ka-Band (35 GHz) Low-noise 180 nm SOI CMOS Amplifier

DTMOS Low Noise Amplifier Design in Partially Depleted SOI CMOS Technology

Multi-Gate Devices

Multi-Gate Devices

3 Dimensional GAA Transitors : twin silicon nanowire MOSFET and multi-bridge-channel MOSFET

Effects of ALD TiN Metal Gate Thickness on Metal Gate /High-k Dielectric SOI FinFET Characteristics

Investigation of Optimum Gate Workfunction for CMOS 4-Terminal MuGFETs

Comparison of Tri-gate FET Characteristics for Various Hydrogen Annealing Process Conditions

Source/Drain Extension Region Engineering in Nanoscale Double Gate MOSFETs for Low-Voltage Analog Applications

Optimal Design of Nanoscale Triple-Gate Devices

Applying SOI Technology on Carbon Nanotube Transistors

First Report on Self-Switching-Diodes in SOI

Back-Gate Controlled Wide Tunable Range Diode Voltage in Asymmetrical Double-Gate Devices

Silicon-On-Insulator Bulk Acoustic Wave Disk Resonators

Quantum effects influence on thin silicon film capacitor-less DRAM performance

Experimental Study on Mobility Universality in (100) Ultra Thin Body nMOSFET with SOI Thickness of 5nm

Fully Depleted SOI MOSFETs with WSix metal gate on HfO2 gate dielectric

Effects of Temperature on Metal Gate FinFET Circuit Performance

Demonstration of Asymmetric Gate Oxide Thickness 4-Terminal FinFETs

Exploration of the Circuit Potential of Multiple-Gate Field-Effect Transistors

2005 IEEE International SOI Conference Proceedings

2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573)

2003 IEEE International Conference on SOI

2002 IEEE International SOI Conference

2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207)

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125)

1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)

1998 IEEE International SOI Conference Proceedings (Cat No.98CH36199)

1997 IEEE International SOI Conference Proceedings

1996 IEEE International SOI Conference Proceedings

1995 IEEE International SOI Conference Proceedings

Proceedings. IEEE International SOI Conference

Proceedings of 1993 IEEE International SOI Conference

1992 IEEE International SOI Conference

1991 IEEE International SOI Conference Proceedings

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