NDLI: Photon back-scatter analysis of SOI wafers

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2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573)

2003 IEEE International Conference on SOI

2003 IEEE International SOI Conference. Proceedings (Cat. No.03CH37443)

SOI nano-technology for high-performance system on-chip applications

Ultralow-voltage MTCMOS/SOI circuits for batteryless wireless system

Photonic bandgap microcavities and waveguides

A new block refresh concept for SOI floating body memories

Potential of SOI intrinsic MOSFETs for ring VCO design

Ultra low-power design techniques using special SOI MOS diodes

A low power four transistor Schmitt Trigger for asymmetric double gate fully depleted SOI devices

Human Body Model ESD protection concepts in SOI and bulk CMOS at the 130 nm node

Proton induced single event upset in a 4M SOI SRAM

Fully-depleted SOI process optimization for 60 nm CMOS transistors

FinFET technology for future microprocessors

High resolution 2D Scanning Spreading Resistance Microscopy (SSRM) of thin film SOI MOSFETs with ultra short effective channel length

High performance partially depleted SOI using spike RTA

Elimination of parasitic channels in fully depleted SOI CMOS

Effects of SOI film thickness on high-performance microprocessor by 0.13 /spl mu/m Partially-Depleted SOI CMOS technology

SGOI thinning and uniformity improvement using a fluoride GCIB process

Surface smoothing effect in patterned SOI fabrication with SIMOX technology

High resistivity SOI substrates: how high should we go?

Photon back-scatter analysis of SOI wafers

The G/sup 4/-FET: low voltage to high voltage operation and performance

A novel photodiode-type active pixel sensor utilizing DTMOS with reduced fixed-pattern-noise

Silicon single crystal on quartz: fabrication and benefits

Effect of nano-scale strained Si grown on SiGe-on-insulator on electron mobility

A novel local bottom-gate carbon nanotube field effect transistor on SOI

Accumulation-mode pi-gate MOSFET

Design of DG-MOSFETs for high linearity performance

NiSi MOCVD for fabricating FinFETs and UTB-SOI devices

Optimizing the salicide thickness for improving 130 nm PD SOI performances

Charge pumping effects in partially depleted SOI MOSFETs

Frequency degradation of SOI MOS device output conductance

Peculiarities of the temperature behavior of SOI MOSFETs in the deep submicron area

Modeling isolation-induced mechanical stress effect on SOI MOS devices

Minimizing the floating body induced SEU sensitivity in a 0.35 /spl mu/ SOI SRAM cell through recombination lifetime control

Micropower, 0.35-/spl mu/m partially depleted SOI CMOS preamplifiers having low white and flicker noise

Noise considerations and detailed comparison of low standby gate/sub-threshold leakage digital circuits in nano-scale SOI technology

High temperature DC characterization of fully-depleted 0.5 /spl mu/m SOS-CMOS MOSFETs for analog circuit design

Stand-by current in PD-SOI pseudo-nMOS circuits

Double gate MOSFET subthreshold logic for ultra-low power applications

Analysis of the impact of gate-body signal phase on DTMOS inverters in 0.13 /spl mu/m PD-SOI

New process and pixel structure of an SOI-CMOS imager

A CMOS active pixel sensor on silicon-on-sapphire substrate with backside illumination

Scaled front-side and back-side trapping SONOS memories on SOI

Finfet with isolated n+ and p+ gate regions strapped with metal and polysilicon

Corner effect in multiple-gate SOI MOSFETs

The pH response of a silicon-on-insulator MOSFET with an integrated nanofluidic cell

Optically tunable narrowband filter using defect-induced pass-band in photonic crystal waveguide

Control of threshold voltage and short channel effects in ultra-thin strained-SOI CMOS

Short channel and back-gate coupling effects in silicon-on-nothing (SON) MOSFETs

SOI wafer polishing with magnetorheological finishing (MRF)

Formation of strained Si/SiGe on insulator structure with a [110] surface

Systematic study of the splitting kinetic of H/He co-implanted substrate

Nonuniformity of commercial SOI wafers manifested by photoluminescence and lifetime mapping

Strain evaluation for thin strained-Si on SGOI and strained-Si on nothing (SSON) structures using nano-beam electron diffraction (NBD)

Nano-uniformity control in Unibond/sup /spl reg// process

Requirements for ultra-thin-film devices and new materials on CMOS roadmap

A detailed analysis of SOI MOSFETs for SOC design

Low frequency noise (LFN) characteristics of SiGe channel SOI dynamic threshold MOSFETs (SiGe-SOI-DTMOS) for low-power applications

Impact of non-vertical sidewall on sub-50 nm FinFET

Mobility enhancement via volume inversion in double-gate MOSFETs

Non-classical CMOS device design

Impact of self-heating on digital SOI and strained-silicon CMOS circuits

The impact of STI mechanical stress on the device performance of 90 nm technology node with different substrates and isolation processes

Impact ionization and band-to-band tunneling in ultrathin body SOI devices with undoped channels

Anomalous history behavior in stacked PD SOI gates

A new and fast method to compute steady state in PD-SOI circuits and its application to standard cells library characterization

The role of dynamic threshold shifts in the performance of inverters and NAND gates in PD SOI technology

Low voltage/low power sub 50 nm double gate SOI ratioed logic

A new dynamic beta-ratio circuit technique for strained-Si technology

Broaden buried oxide layer of SOI structure in SIMOX using water plasma

Quantum mechanical effects on double-gate MOSFET scaling

2002 IEEE International SOI Conference

2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207)

2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125)

1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)

1998 IEEE International SOI Conference Proceedings (Cat No.98CH36199)

1997 IEEE International SOI Conference Proceedings

1996 IEEE International SOI Conference Proceedings

1995 IEEE International SOI Conference Proceedings

Proceedings. IEEE International SOI Conference

Proceedings of 1993 IEEE International SOI Conference

1992 IEEE International SOI Conference

1991 IEEE International SOI Conference Proceedings

Photon back-scatter analysis of SOI wafers

Content Provider	IEEE Xplore Digital Library
Author	Zingg, R.P. Orazio, F.D.
Copyright Year	2003
Description	Author affiliation: Philips Semicond., Nijmegen, Netherlands (Zingg, R.P.)
Abstract	Silicon-on-insulator (SOI) provides novel challenges in metrology and prevention of subsurface micro-defects. This article shows the potential of a unique analysis tool to pinpoint and eliminate sources of such damage, which can severely degrade minority carrier lifetimes and therefore bipolar device gain. Cross-sectional analysis of an IC manufacturing process has been done for the first time, indicating curing by annealing and generation of new defects by different process steps.
Sponsorship	IEEE Electron Devices Soc
Starting Page	52
Ending Page	54
File Size	262790
Page Count	3
File Format	PDF
ISBN	0780378156
ISSN	1078621X
DOI	10.1109/SOI.2003.1242894
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-10-02
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Silicon on insulator technology Charge carrier lifetime Integrated circuit manufacture Annealing Optical scattering Laser radiation effects
Content Type	Text
Resource Type	Article

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