NDLI: An FPGA based coprocessor for 3D affine transformations

Content Provider	IEEE Xplore Digital Library
Author	Bensaali, F. Amira, A. Bouridane, A.
Copyright Year	2003
Description	Author affiliation: Sch. of Comput. Sci., Queen's Univ., Belfast, UK (Bensaali, F.; Amira, A.; Bouridane, A.)
Abstract	3D graphics performance is increasing faster than any other computing application. Almost all PC systems now include 3D graphics accelerators for games, Computer Aided Design (CAD) or visualization applications. This paper investigates the suitability of Field Programmable Gate Array (FPGA) devices as a low cost solution for implementing 3D affine transformations. A proposed solution based on processing large matrix multiplication has been implemented, for large 3D models, on the RC1000-PP Celoxica board based development platform using Handel-C, a C-like language supporting parallelism, flexible data size and compilation of high-level programs directly into FPGA hardware.
Sponsorship	Xilinx Inc. Celoxica Interdesign Technol. Tokyo Electron Device Ltd. Memec Japan K.K. Elixent Inc. Synplicity Inc. Altera Corp. QuickSilver
Starting Page	288
Ending Page	291
File Size	279584
Page Count	4
File Format	PDF
ISBN	0780383206
DOI	10.1109/FPT.2003.1275759
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2003-12-17
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field programmable gate arrays Coprocessors Computer graphics Application software Computer applications Design automation Visualization Costs Parallel processing Hardware
Content Type	Text
Resource Type	Article

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4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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