NDLI: A low power 9GHz divide-by-3 injection locked frequency divider in 0.18μm CMOS with 15% locking range

Content Provider	IEEE Xplore Digital Library
Author	Asadian, S. Hemmati, M.J. Naseh, S.
Copyright Year	2011
Description	Author affiliation: Electrical Engineering Group, Ferdowsi University of Mashhad, Mashhad, Iran (Asadian, S.; Hemmati, M.J.; Naseh, S.)
Abstract	A new low power divide-by-3 injection locked LC divider is proposed for PLL-based frequency synthesizers. The circuit is made of two voltage controlled oscillators coupled together via four MOSFETs, where capacitors are placed in series with the source of the coupling transistors leading to a reduction in power consumption. The control voltage of the two VCOs are tied together to achieve a wider locking range. A locking range of 1.25 GHz (from 7.9 GHz to 9.15 GHz) was achieved. The divider draws 610μA from a 1.2V supply voltage.
Starting Page	611
Ending Page	614
File Size	646797
Page Count	4
File Format	PDF
ISBN	9781457718458
e-ISBN	9781457718465
e-ISBN	9781457718441
DOI	10.1109/ICECS.2011.6122349
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2011-12-11
Publisher Place	Lebanon
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Frequency conversion Transistors Voltage-controlled oscillators Capacitors CMOS integrated circuits Power demand injection transistors Injection locked frequency divider divide-by-3 cross-coupled LC oscillator DC-blocking capacitor
Content Type	Text
Resource Type	Article

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A low power 9GHz divide-by-3 injection locked frequency divider in 0.18μm CMOS with 15% locking range