NDLI: ESD induced latent defects in CMOS ICs and reliability impact

Content Provider	IEEE Xplore Digital Library
Author	Guitard, N. Tremouilles, D. Alves, S. Bafleur, M. Beaudoin, F. Perdu, P. Wislez, A.
Copyright Year	2004
Description	Author affiliation: LCIE, Toulouse, France (Wislez, A.) \|\| LAAS-CNRS, Toulouse, France (Guitard, N.; Tremouilles, D.; Alves, S.; Bafleur, M.) \|\| CNES-THALES, Toulouse, France (Beaudoin, F.; Perdu, P.)
Abstract	A dedicated test vehicle was designed to study the impact of ESD induced latent defects on digital and analog CMOS circuits. Both CDM and TLP stresses were applied to these circuits through a specific pad which allows stressing the circuit core. Both electrical characterization and non-destructive failure analysis were performed to locate the induced defect. For digital circuits, functionality is not affected although the IDDQ quiescent current increased. However, after burn-in and storage, it was observed that the IDDQ current significantly increased suggesting that the circuit lifetime is degraded. In contrast, even at very low stress level, the analog circuit exhibits a dramatic offset degradation and no recovery is observed after burn-in.
Starting Page	1
Ending Page	8
File Size	474193
Page Count	8
File Format	PDF
ISBN	9781585370634
DOI	10.1109/EOSESD.2004.5272615
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-09-19
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	EOS/ESD Association, Inc.
Subject Keyword	Electrostatic discharge Circuit testing Stress Degradation Vehicles CMOS digital integrated circuits CMOS analog integrated circuits Failure analysis Digital circuits Analog circuits
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Mr. Siddhartha Mukherjee siddhartha@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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