NDLI: An overhead reducing technique for Time Warp

Content Provider	IEEE Xplore Digital Library
Author	Moon Jung Chung Jinsheng Xu
Copyright Year	2002
Description	Author affiliation: Dept. of Comput. Sci. & Eng., Michigan State Univ., USA (Moon Jung Chung; Jinsheng Xu)
Abstract	We introduce a technique that reduces the number of state savings and the maximum memory needed for the Time Warp. We present a technique to determine if an event is safe or not. If an event execution is safe, no state saving is carried out. The technique discards some saved states even though the time stamps are larger than the GVT. We prove that the technique is correct under both the aggressive and lazy cancellation scheme. This technique can be implemented with minimal additional overhead. Benchmark results on circuit simulation show that the mechanism can reduce the number of state savings and maximum memory size significantly. The technique is applicable to hardware simulation, network simulation and other systems that have fixed interconnection.
Sponsorship	IEEE Computer. Soc. Tech. Committee on Parallel Process. IEEE Comput. Soc. Tech. Committee on Simulation IEEE Comput. Soc. Tech. Committee on Comput. Architecture
Starting Page	95
Ending Page	102
File Size	409310
Page Count	8
File Format	PDF
ISBN	0769518532
ISSN	15301990
DOI	10.1109/DISRTA.2002.1166894
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-10-13
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Circuit simulation Hardware Costs Computational modeling Moon Computer science Integrated circuit interconnections Discrete event simulation Time warp simulation Discrete event systems
Content Type	Text
Resource Type	Article

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