NDLI: A simple architecture of low voltage GHz BiCMOS four-quadrant analogue multiplier using complementary voltage follower

Content Provider	IEEE Xplore Digital Library
Author	Li, S.C. Chien, R. Chien, J. Kaung-Long Lin
Copyright Year	1998
Description	Author affiliation: Dept. of Humanity & Sci., Nat. Yunlin Univ. of Sci. & Technol., Taiwan (Li, S.C.)
Abstract	A new architecture of simple low voltage BiCMOS four-quadrant multiplier is proposed and analyzed. It operates with /spl plusmn/1.5 V power supplies and 3 V/sub p-p/ fully input signal swings. Simulation results based on AMS 0.8 /spl mu/m n-well BiCMOS process parameters are given to verify the theoretical analysis. The architecture of four multipliers typically have a nonlinearity error less than 1% over /spl plusmn/1.5 V input range and a -3 dB bandwidth of several GHz. The total harmonic distortion for frequencies up to 4 GHz is less than 6% with maximum input voltage at /spl plusmn/1.5 V. Simple structure, low-voltage and low power capability, and high performance make the proposed multiplier quite feasible in many GHz nonlinear signal processing applications.
Starting Page	13
Ending Page	18
File Size	509204
Page Count	6
File Format	PDF
ISBN	0780344251
DOI	10.1109/ASPDAC.1998.669391
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-02-13
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Low voltage BiCMOS integrated circuits Linearity Signal processing Frequency MOS devices Power supplies Bandwidth MOSFETs Threshold voltage
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Wide range linear tunable BiCMOS transconductor and four-quadrant multiplier

Low-voltage BiCMOS four-quadrant multiplier using triode-region transistors

A new wideband BiCMOS four-quadrant analog multiplier

A 100MHz 4mW Four-Quadrant BiCMOS Analogue Multiplier

A very-high-frequency CMOS four-quadrant analogue multiplier

A /spl plusmn/1.5 V CMOS four-quadrant analogue multiplier using 3 GHz analogue squaring circuits

A 1.2 V CMOS four-quadrant analog multiplier

Low voltage low power CMOS four-quadrant analog multiplier for neural network applications

A simple 4 quadrant NMOS analog multiplier with input range equal to ±VDD and very low THD

A simple architecture of low voltage GHz BiCMOS four-quadrant analogue multiplier using complementary voltage follower

Similar Documents

Wide range linear tunable BiCMOS transconductor and four-quadrant multiplier

Low-voltage BiCMOS four-quadrant multiplier using triode-region transistors

A new wideband BiCMOS four-quadrant analog multiplier

A 100MHz 4mW Four-Quadrant BiCMOS Analogue Multiplier

A very-high-frequency CMOS four-quadrant analogue multiplier

A /spl plusmn/1.5 V CMOS four-quadrant analogue multiplier using 3 GHz analogue squaring circuits

A 1.2 V CMOS four-quadrant analog multiplier

Low voltage low power CMOS four-quadrant analog multiplier for neural network applications

A simple 4 quadrant NMOS analog multiplier with input range equal to ±VDD and very low THD

A simple architecture of low voltage GHz BiCMOS four-quadrant analogue multiplier using complementary voltage follower