NDLI: A low energy HEVC inverse transform hardware

Content Provider	IEEE Xplore Digital Library
Author	Kalali, E. Ozcan, E. Yalcinkaya, O.M. Hamzaoglu, I.
Copyright Year	1975
Abstract	In this paper, a novel energy reduction technique for High Efficiency Video Coding (HEVC) Inverse Discrete Cosine Transform (IDCT) and Inverse Discrete Sine Transform (IDST) for all transform unit (TU) sizes is proposed. The proposed technique calculates IDCT and IDST only for DC coefficient if the values of several predetermined forward transformed low frequency coefficients in a TU are smaller than a threshold. The proposed technique reduces the computational complexity of IDCT and IDST significantly. It increases the bit rate slightly for most video frames. It decreases the PSNR slightly for some video frames, and it increases the PSNR slightly for some video frames. In this paper, a low energy HEVC 2D inverse transform (IDCT and IDST) hardware for all TU sizes is also designed and implemented using Verilog HDL. In the worst case, the proposed hardware can process 48 Quad HD (3840x2160) video frames per second. The proposed technique reduced the energy consumption of this hardware up to 32%. Therefore, the proposed hardware can be used in portable consumer electronics products that require a real-time HEVC encoder.
Sponsorship	IEEE Consumer Electronics Society
Starting Page	754
Ending Page	761
Page Count	8
File Size	381730
File Format	PDF
ISSN	00983063
Volume Number	60
Issue Number	4
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-01-01
Publisher Place	U.S.A.
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Hardware PSNR Laplace equations Discrete cosine transforms Bit rate Clocks Low Energy HEVC Inverse Transform IDCT IDST Hardware Implementation
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Media Technology

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Mr. Siddhartha Mukherjee siddhartha@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	ndl-support@iitkgp.ac.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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