NDLI: A Novel Emulator for Discrete-Time MIMO Triply Selective Fading Channels

Content Provider	IEEE Xplore Digital Library
Author	Fei Ren Zheng, Y.R.
Copyright Year	2004
Abstract	Hardware implementation of discrete-time triply selective Rayleigh fading channel emulators is proposed for multiple-input-multiple-output (MIMO) communications. The proposed work differs from existing ones in that it incorporates temporal correlation, intertap correlation, and spatial correlation matrices into multiple uncorrelated frequency-flat fading waveforms to obtain a triply selective fading channel. The flat fading waveforms with temporal correlation or Doppler spectrum are generated using a sum-of-sinusoid method. The intertap correlation matrix associated with multipath delay spread is computed according to the channel power delay profile and transmit/receive filters. The spatial correlation matrices are predefined inputs associated with transmit and receive antenna arrangements. The square roots of the three correlation matrices are computed via singular-value decomposition and then combined in real time with the flat fading waveforms. Several fading channel examples are implemented on an Altera Stratix III EP3SL150F field-programmable gate array (FPGA) DSP development kit with fixed-point arithmetics. A 4-by-4 MIMO triply selective channel with ten correlated delay taps per subchannel utilizes one-third of the hardware resource of the FPGA chip. The statistical properties of the emulated fading waveforms match those of the software-based simulators and the theoretical ones. The proposed method achieves good balance between computational complexity and resource utilization.
Sponsorship	IEEE Circuits and Systems Society
Starting Page	2542
Ending Page	2551
Page Count	10
File Size	668425
File Format	PDF
ISSN	15498328
Volume Number	57
Issue Number	9
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-09-01
Publisher Place	U.S.A.
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	MIMO Fading Matrix decomposition Delay Field programmable gate arrays Hardware Rayleigh channels Frequency Filters Receiving antennas wireless fading channel modeling Discrete-time triply selective fading channels field-programmable gate array (FPGA) hardware implementation multiple-input–multiple-output (MIMO) systems sum-of-sinusoid (SoS) method
Content Type	Text
Resource Type	Article
Subject	Hardware and Architecture Electrical and Electronic Engineering

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