NDLI: Flip-chip underfilling with non-conductive photoinitiated adhesives

Content Provider	IEEE Xplore Digital Library
Author	Spiegel, M.
Copyright Year	1997
Description	Author affiliation: DELO Industrieklebstoffe GmbH & Co. KG, Ohmstrasse, Germany (Spiegel, M.)
Abstract	The trend for miniaturisation in electronic equipment is continuing unabated. The increasing complexity of electronic memory components allows for new layout structures and design possibilities which constantly reinforce this trend. As IC capacity rises, new packaging technologies are also gaining steadily in importance, and flip-chip technology has established itself as a marketable and highly efficient technique. When flip-chip technology is used, there is always a need to fill the gap between die and substrate with a resin, also known as an underfill. Due to different coefficients of thermal expansion, stresses appear between bumps and die as well as between bumps and substrate. The underfill minimises or compensates these stresses. Additionally, it ensures the die's mechanical stability on the substrate. This paper presents three different underfiller systems which are cured by three different mechanisms. These completely new and partly unique underfilling materials have been developed on the basis of elastified, single component epoxy resins, and are suitable for a wide range of carrier substrates, offering obvious advantages compared with the systems available on the market at present. Greater attention is paid to those underfills which enable completely new underfilling techniques involving photoinduced pre-activation by light of a certain wavelength and intensity, even without subsequent heat curing. This technology opens up new ways of drastically cutting flip-chip process cost by economising on several process steps.
Starting Page	293
Ending Page	299
File Size	719384
Page Count	7
File Format	PDF
ISBN	0780338650
DOI	10.1109/PEP.1997.656502
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1997-10-30
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Thermal expansion Electronic equipment Stability Epoxy resins Curing Integrated circuit packaging Thermal stresses Consumer electronics Electronics packaging Packaging machines
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Mr. Siddhartha Mukherjee siddhartha@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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