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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Trong-Yen Lee Yang-Hsin Fan Yu-Min Cheng Chia-Chun Tsai Rong-Shue Hsiao |
| Copyright Year | 2007 |
| Description | Author affiliation: Nat. Taipei Univ. of Technol., Taipei (Trong-Yen Lee; Yang-Hsin Fan; Yu-Min Cheng) |
| Abstract | In this paper, we present hardware-oriented partitioning approach that can solve the partitioning issues for embedded multiprocessor FPGA systems. In addition, it can gain a better partitioning result, faster execution time, less memory and higher slice used rate, under satisfied system constraints. We also demonstrate the feasibility of our approach by a JPEG encoding system using Xilinx ML310 FPGA platform. Experiment results show that the execution time and memory size are improved. |
| Starting Page | 65 |
| Ending Page | 65 |
| File Size | 238092 |
| Page Count | 1 |
| File Format | |
| ISBN | 0769528821 |
| DOI | 10.1109/ICICIC.2007.332 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2007-09-05 |
| Publisher Place | Japan |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Computer science Embedded computing Software systems Hardware Libraries Encoding High level synthesis Flow graphs Field programmable gate arrays Information systems |
| Content Type | Text |
| Resource Type | Article |
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