NDLI: Full swing 20 GHz frequency divider with 1 V supply voltage in FD-SOI 28 nm technology

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2015 Nordic Circuits and Systems Conference (NORCAS): NORCHIP & International Symposium on System-on-Chip (SoC)

Table of contents

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Full swing 20 GHz frequency divider with 1 V supply voltage in FD-SOI 28 nm technology

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Proceedings Norchip Conference, 2004.

Full swing 20 GHz frequency divider with 1 V supply voltage in FD-SOI 28 nm technology

Content Provider	IEEE Xplore Digital Library
Author	Ozsema, H.G. Kostak, D. Demirci, T. Leblebici, Y.
Copyright Year	2015
Description	Author affiliation: Microelectron. Syst. Lab., Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland (Ozsema, H.G.; Kostak, D.; Demirci, T.; Leblebici, Y.)
Abstract	In this paper we present the design of a programmable frequency divider in 28 nm FD-SOI CMOS technology. It consists of the cascade of a divide-by-2 cell and divide-by-2/3 blocks. The final circuit is capable of dividing by even numbers between 128 and 254. The forward-body-bias property of the process and the differential-cascode voltage-switch-logic (DCVSL) family are used to achieve high operation speed. The proposed circuit achieves a maximum operating frequency of 20 GHz at 1 V supply voltage. And the area and the power consumption of the programmable divider are 1815 μm2 and 4.35 mW, respectively.
Starting Page	1
Ending Page	4
File Size	1059426
Page Count	4
File Format	PDF
e-ISBN	9781467365765
DOI	10.1109/NORCHIP.2015.7364385
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-10-26
Publisher Place	Norway
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Latches Microprocessors Computer architecture Frequency conversion CMOS technology CMOS integrated circuits Topology
Content Type	Text
Resource Type	Article

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