NDLI: Verification strategy determination using dependence analysis of transaction-level models

Content Provider	IEEE Xplore Digital Library
Author	Regimbal, S. Savaria, Y. Bois, G.
Copyright Year	2004
Description	Author affiliation: Dept. of Electr. Eng., Ecole Polytechnique de Montreal, Que., Canada (Regimbal, S.; Savaria, Y.)
Abstract	It is well known that functional verification is a real bottleneck in any digital design development. A robust verification strategy should specify which testbenches are required to verify a system. With a modular system, the determination of which testbenches are required to confirm successful integration of each module is generally done in an ad-hoc fashion. In this paper, we propose a systematic approach supported by a tool to determine effective module combinations that should be verified when integrating a modular system. A goal of verification being to detect errors, it is valuable to create the most favorable situation to detect them. Our proposed approach is based on a static dependence analysis of a transaction-level model and the evaluation of module combinations using a verifiability metric. Using our methodology, we are able to provide quantitative results in order to help verification engineers determine which module combinations are the most appropriate for integration.
Sponsorship	IEEE Circuits and Syst. Soc. Micronet R&D iCore Univ. of Calgary, Canada Alberta Innovations and Sci
Starting Page	87
Ending Page	92
File Size	575959
Page Count	6
File Format	PDF
ISBN	0769521827
DOI	10.1109/IWSOC.2004.1319856
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-07-19
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	System testing Digital systems Software engineering System-on-a-chip Design engineering Robustness Microelectronics High level languages Abstracts Hardware
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Mr. Siddhartha Mukherjee siddhartha@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	ndl-support@iitkgp.ac.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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