NDLI: A CPU, GPU, FPGA System for X-Ray Image Processing Using High-Speed Scientific Cameras

Content Provider	IEEE Xplore Digital Library
Author	Delazari Binotto, A.P. Doering, D. Stetzelberger, T. McVittie, P. Zimmermann, S. Pereira, C.E.
Copyright Year	2013
Description	Author affiliation: LBNL (Lawrence Berkeley Nat. Lab.), Berkeley, CA, USA (Delazari Binotto, A.P.; Doering, D.; Stetzelberger, T.; McVittie, P.; Zimmermann, S.) \|\| UFRGS - Fed. Univ. of Rio Grande do Sul, Porto Alegre, Brazil (Pereira, C.E.)
Abstract	Currently, computers can be composed of different Processing Units (PUs) - general-purpose and also programmable and specialist-purpose. One of the goals for such heterogeneity is to improve applications' performance. Particularly, scientific applications can highly benefit from this kind of platform. They produce large amounts of data within several types of algorithms, and distinct PUs are an alternative to better execute such tasks. This work presents a new system box - composed of CPU, GPU, and FPGA - to carry on site X-ray image evaluations. It was firstly tested by evaluating the performance of a Linear Integration (LI) algorithm over the PUs. This algorithm is largely used by synchrotron experiments in which high-speed X-ray cameras produce extremely large amounts of data for post-processing analysis, which includes performing LI. In our experiments, LI execution was around 30x faster in FPGA compared to CPU, achieving a similar performance to GPU. Taking the end-to-end application, i.e., image transfer into memory, this rate increases to hundreds. Issues for using FPGAs as a co-processor under our dynamic scheduling framework is also discussed. Synthesizing times for LI when assigned to FPGA are still too long for dynamic scheduling, preventing online synthesizing of functions not designed a priori.
Starting Page	113
Ending Page	119
File Size	817120
Page Count	7
File Format	PDF
e-ISBN	9781479929283
DOI	10.1109/SBAC-PAD.2013.1
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-10-23
Publisher Place	Brazil
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Field programmable gate arrays Cameras Graphics processing units X-ray imaging Vectors Central Processing Unit Image processing Linear integration GPU FPGA High-speed x-ray cameras Heterogeneous systems Dynamic scheduling
Content Type	Text
Resource Type	Article

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