NDLI: The LEAP FPGA operating system

Content Provider	IEEE Xplore Digital Library
Author	Fleming, K. Hsin-Jung Yang Adler, M. Emer, J.
Copyright Year	2014
Description	Author affiliation: VSSAD Group, Intel Corp., Santa Clara, CA, USA (Fleming, K.; Adler, M.; Emer, J.) \|\| Comput. Sci. & A.I. Lab., Massachusetts Inst. of Technol., Cambridge, MA, USA (Hsin-Jung Yang)
Abstract	FPGAs offer attractive power and performance for many applications, especially relative to traditional sequential architectures. In spite of these advantages, FPGAs have been deployed in only a few, niche domains.We argue that the difficulty of programming FPGAs all but precludes their use in more general systems: FPGA programmers are currently exposed to all the gory system details that software operating systems long ago abstracted away. In this work, we present the Latency-insensitive Environment for Application Programming (LEAP), an FPGA operating system built around latency-insensitive communications channels. LEAP alleviates the FPGA programming problem by providing a rich set of portable latency-insensitive abstraction layers for program development. Unlike software operating systems services, which are generally dynamic, the nature of FPGAs requires that many configuration decisions be made at compile time. We present an extensible interface for compile-time management of resources. We demonstrate that LEAP provides design portability, while consuming as little as 3% of FPGA area, by mapping several designs on to various FPGA platforms.
Starting Page	1
Ending Page	8
File Size	293445
Page Count	8
File Format	PDF
ISBN	9783000446450
DOI	10.1109/FPL.2014.6927488
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2014-09-02
Publisher Place	Germany
Access Restriction	Subscribed
Rights Holder	Technical University of Munich (TUM)
Subject Keyword	Field programmable gate arrays Operating systems Libraries Program processors Hardware Abstracts
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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