NDLI: Redundant Radix-2r Number System for Accelerating Arithmetic Operations on the FPGAs

Content Provider	IEEE Xplore Digital Library
Author	Kawakami, K. Shigemoto, K. Nakano, K.
Copyright Year	2008
Description	Author affiliation: Dept. of Inf. Eng., Hiroshima Univ., Higashi-Hiroshima (Kawakami, K.; Shigemoto, K.; Nakano, K.)
Abstract	The main contribution of this paper is to present hardware algorithms for redundant $radix-2^{r}$ number system in the FPGA to speed the arithmetic operations for numbers with many bits, which have applications in security systems such as RSA encryption and decryption. Our hardware algorithms accelerate arithmetic operations including addition, multiplication, and Montgomery modulo multiplication.Quite surprisingly, our hardware algorithms of the multiplication and Montgomery multiplication for two 1024-bit numbers runs only 64 clock cycles using redundant $radix-2^{16}$ number system. Also, the experimental results for Xilinx Virtex-II Pro Family FPGA XC2VP100-6 show that the clock frequency of our circuit is independent of the number of bits. The speed up factors of our hardware algorithm using the redundant number system over those using the conventional number system are 8.3 for 1024-bit addition, 3.4 for 1024-bit multiplication, and 2.5 for 1024-bit Montgomery modulo multiplication. Further, for 256-bit Montgomery modulo multiplication, our hardware algorithm runs in 0.38 mus, while a previously known implementation runs in 1.22 mus. Thus, our approach using redundant number system for arithmetic operations is very efficient.
Starting Page	370
Ending Page	377
File Size	220950
Page Count	8
File Format	PDF
ISBN	9780769534435
DOI	10.1109/PDCAT.2008.13
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-12-01
Publisher Place	New Zealand
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Acceleration Arithmetic Field programmable gate arrays Hardware Adders Clocks Programmable logic arrays Cryptography Integrated circuit interconnections Logic functions FPGA RSA Redundant Number System
Content Type	Text
Resource Type	Article

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