NDLI: Robustly testable array multipliers under realistic sequential cell fault model

Content Provider	IEEE Xplore Digital Library
Author	Psarakis, M. Gizopoulos, D. Paschalis, A. Zorian, Y.
Copyright Year	1998
Description	Author affiliation: Inst. of Inf. & Telecommun., Athens, Greece (Psarakis, M.)
Abstract	Traditional combinational fault models are not sufficient to detect to most common failure mechanisms in CMOS Iterative Logic Arrays (ILAs). The Realistic Sequential Cell Fault Model (RS-CFM) provides a comprehensive, robust test methodology for ILAs. It also satisfies the requirements for low test complexity and cell implementation independence. Adopting RS-CFM, we first provide sufficient conditions for two-dimensional (2D) ILAs to be robustly testable for first time in the literature. Then, we propose sufficient modifications to the carry-save and carry-propagate array multipliers so that they can be treated robustly with respect to RS-CPM with a test set of linear size.
Starting Page	152
Ending Page	157
File Size	197642
Page Count	6
File Format	PDF
ISBN	0818684364
ISSN	10930167
DOI	10.1109/VTEST.1998.670863
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1998-04-30
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Robustness Sequential analysis Logic arrays Tellurium Circuit faults Integrated circuit modeling Integrated circuit testing Fault detection Gas detectors Circuit testing
Content Type	Text
Resource Type	Article

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Robustly testable array multipliers under realistic sequential cell fault model