NDLI: A CMOS analog front-end IC for DMT ADSL

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2015 IEEE International Solid-State Circuits Conference - (ISSCC) Digest of Technical Papers

2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)

2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers

2012 IEEE International Solid-State Circuits Conference

2011 IEEE International Solid-State Circuits Conference

2010 IEEE International Solid-State Circuits Conference - (ISSCC)

2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers

2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers

ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.

2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519)

2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.

2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315)

2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177)

2000 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.00CH37056)

1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition (Cat. No.99CH36278)

1999 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC. First Edition [Front Cover and Table of Contents]

The new frontier created by high-bandwidth digital video systems and services

High speed: not the only way to exploit the intrinsic computational power of silicon

Broadband communications ICs: enabling high-bandwidth connectivity in the home and office

A 450 Mb/s analog front-end for PRML read channels

A trellis-coded E/sup 2/PRML digital read/write channel IC

A mixed-signal 120 MSample/s PRML solution for DVD systems

360 Mb/s (400 MHz) 1.1 W 0.35 /spl mu/m CMOS PRML read channels with 6 burst 8-20/spl times/ over-sampling digital servo

260 Mb/s mixed-signal single-chip integrated system electronics for magnetic hard disk drives

A 3V 10-100 MHz continuous-time seventh-order 0.05/spl deg/ equiripple linear-phase filter

A 300 Mb/s BiCMOS disk drive channel with adaptive analog equalizer

A 1.5 V 1.0 mW audio /spl Delta//spl Sigma/ modulator with 98 dB dynamic range

A Nyquist-rate pipelined oversampling A/D converter

A 6th-order continuous-time bandpass /spl Sigma//spl Delta/ modulator for digital radio IF

A bandpass mismatch-shaped multi-bit /spl Sigma//spl Delta/ switched-capacitor DAC using butterfly shuffler

A 190MHz IF, 400 MSample/s CMOS direct-conversion bandpass /spl Sigma//spl Delta/ modulator

A 400 MHz 12 b 18 mW IF digitizer with mixer inside a /spl Sigma//spl Delta/ modulator loop

How SiGe evolved into a manufacturable semiconductor production process

A DECT transceiver chip set using SiGe technology

Monolithic CMOS distributed amplifier and oscillator

Fully-integrated CMOS RF amplifiers

High-frequency analog filters in deep-submicron CMOS technology

Broadband communication circuits in pure digital deep sub-micron CMOS

Tunable, switchable, high-Q VHF microelectromechanical bandpass filters

A 1.9 GHz micromachined-based low-phase-noise CMOS VCO

An analog CMOS IC for template matching

A 500 MHz 64b RISC CPU with 1.5 MB on-chip cache

609 MHz G5 S/399 microprocessor

Storage hierarchy to support a 600 MHz G5 S/390 microprocessor

A 7/sup th/-generation x86 microprocessor

An out-of-order three-way superscalar multimedia floating-point unit

450 MHz PowerPC/sup TM/ microprocessor with enhanced instruction set and copper interconnect

A 600 MHz IA-32 microprocessor with enhanced data streaming for graphics and video

A sub-40 ns random-access chain FRAM architecture with a 768 cell-plate-line drive

A 0.5 /spl mu/m 3 V 1T1C 1 Mb FRAM with a variable reference bitline voltage scheme using a fatigue-free reference capacitor

Multi-mode and multi-level technologies for FeRAM embedded reconfigurable hardware

Multi-phase-driven split-word-line ferroelectric memory without plate line

A 256 Mb multilevel flash memory with 2 MB/s program rate for mass storage applications

A 130 mm/sup 2/ 256 Mb NAND flash with shallow trench isolation technology

A 29mm/sup 2/ 1.8 V-only 16 Mb DINOR flash memory with gate-protected poly-diode (GPPD) charge pump

A 3.3 V 90 MHz flash memory module embedded in a 32 b RISC microcontroller

2D magnetic micro fluxgate system with digital signal output

An interface IC for a capacitive silicon /spl mu/g accelerometer

An SOI 0.6 mV offset temperature-compensated Hall sensor readout IC for automotive applications up to 200/spl deg/C

Programmable mixed-voltage sensor readout circuit and bus interface with built-in self-test

A 15/spl times/15 mm/sup 2/ single-chip fingerprint sensor and identifier using pixel-parallel processing

A CMOS micro touch pointer

A 100 frame/s CMOS active pixel sensor for 3D-gesture recognition system

A 14 b 150 Msample/s update rate Q/sup 2/ random walk CMOS DAC

A 14 b 100 Msample/s CMOS DAC designed for spectral performance

A 110 dB THD, 18 mW DAC using output sampling and feedback to reduce distortion

A multi-bit /spl Delta//spl Sigma/ audio DAC with 120 dB dynamic range

PowerDAC: a single-chip audio DAC with a 70%-efficient power stage in 0.5 /spl mu/m CMOS

An on-chip high-efficiency and low-noise DC/DC converter using divided switches with current control technique

Damping-factor-control frequency compensation technique for low-voltage low-power large capacitive load applications

A 13.56 MHz CMOS RF identification transponder integrated circuit with a dedicated CPU

A CMOS dual channel, 100 MHz-1.1 GHz transmitter for cable applications

A BiCMOS 300 ns attack-time AGC amplifier with peak-detect-and-hold feature for high-speed wireless ATM systems

A 622 Mb/s CMOS ATM switch access LSI with maintenance cycle interleaved pipeline architecture

A 622 Mb/s 256 k ATM resource management circuit [in CMOS]

A 10 Gb/s (1.25 Gb/sx8) 4/spl times/2 CMOS/SIMOX ATM switch

110 GB/s simultaneous bi-directional transceiver logic synchronized with a system clock

A 750 Mb/s 0.6 /spl mu/m CMOS two-phase input port using self-tested self-synchronization

A 2B parallel 1.25 Gb/s interconnect I/O interface with self-configurable link and plesiochronous clocking

Low-skew clock generator with dynamic impedance and delay matching

Dual-loop spread-spectrum clock generator

Clock dithering for electromagnetic compliance using spread spectrum phase modulation

A 1.4 ns access 700 MHz 288 kb SRAM macro with expandable architecture

A 500 MHz 1.5 MB cache with on-chip CPU

A 0.29 ns 32-word by 32 b three-port bipolar register file implemented using a SiGe HBT BiCMOS technology

A 500 MHz pipelined burst SRAM with improved SER immunity

A 940 MHz data rate 8 Mb CMOS SRAM

An 18 Mb, 12.3 GB/s CMOS pipeline-burst cache SRAM with 1.54 Gb/s/pin

10 mW CMOS retina and classifier for handheld, 1000 images/s optical character recognition system

A CMOS vision chip with SIMD processing element array for 1 ms image processing

On-chip integrated CMOS optical microspectrometer with light-to-frequency converter and bus interface

Electronics of single-wall carbon nanotubes

A 160/spl times/120 pixel liquid-crystal-on-silicon microdisplay with an adiabatic DACM

A wireless single-chip telemetry-powered neural stimulation system

An implantable neuro-stimulator device for a retinal prosthesis

A wide-band direct conversion receiver for WCDMA applications

A 22 mW NADC receiver IF chip with integrated second IF channel filtering

Dual-band high-linearity variable-gain low-noise amplifiers for wireless applications

2.1 GHz direct-conversion GaAs quadrature modulator IC for W-CDMA base station

A single-chip CMOS direct-conversion transceiver for 900 MHz spread-spectrum digital cordless phones

A monolithic 3.7 W silicon power amplifier with 59% PAE at 0.9 GHz

A 20 mA-receive 55 mA-transmit GSM transceiver in 0.25 /spl mu/m CMOS

A 1.8 V 14 b audio front end codec for digital cellular phones

A 0.5 /spl mu/m CMOS ADSL analog front-end IC

A CMOS analog front-end IC for DMT ADSL

Codec for echo-canceling, full-rate ADSL modems

A 25 kft 768 kb/s CMOS transceiver for multiple bit-rate DSL

An integrated analog front-end for VDSL

A 70 Mb/s variable-rate DMT-based modem for VDSL

A 52 Mb/s universal DSL transceiver IC

An integrated adaptive analog balancing hybrid for use in (A)DSL modems

A microprocessor with a 128 b CPU, 10 floating-point MACs, 4 floating-point dividers, and an MPEG2 decoder

A high bandwidth superscalar microprocessor for multimedia applications

A 2.5 GFLOPS 6.5 million polygons per second 4-way VLIW geometry processor with SIMD instructions and a software bypass mechanism

A 32 b 64-matrix parallel CMOS processor

A fully-parallel 1 Mb CAM LSI for real-time pixel-parallel image processing

A single-chip MPEG-2 video, audio and system encoder [in CMOS]

A single-chip CIF 30 Hz H261, H263, and H263+ video encoder/decoder with embedded display controller

Flip-flop selection technique for power-delay trade-off [video codec]

A 1.9 V I/O buffer with gate-oxide protection and dynamic bus termination for 400 MHz UltraSparc microprocessor

A versatile 3.3 V/2.5 V/1.8 V CMOS I/O driver built in a 0.2 /spl mu/m 3.5 nm Tox 1.8 V CMOS technology

A CMOS interface circuit for detection of 1.2 Gb/s RZ data

A 18 /spl mu/A-standby-current 1.8 V 200 MHz microprocessor with self substrate-biased data-retention mode

Sense amplifier-based flip-flop

Asynchronous sense differential logic

Low-power design of high-capacitive CMOS circuits using a new charge sharing scheme

A 1/2-inch 1.3 MPixel progressive-scan CCD image sensor employing 0.25 /spl mu/m gap single-layer poly-Si electrodes

A 1/4-inch 630 k pixel IT-CCD image sensor with high-speed capture capability

An integrated 800/spl times/600 CMOS imaging system

Single-chip video camera with multiple integrated functions

A 640/spl times/512 CMOS image sensor with ultra wide dynamic range floating-point pixel-level ADC

A locally adaptive CMOS image sensor with 90 dB dynamic range

A 250 mW, 60 frames/s 1280/spl times/720 pixel 9 b CMOS digital image sensor

A 12 b digital-background-calibrated algorithmic ADC with -90 dB THD

A 3.3 V 10 b 25 Msample/s two-step ADC in 0.35 /spl mu/m CMOS

A 65 mW 10 b 40 Msample/s BiCMOS Nyquist ADC in 0.8 mm/sup 2/

A 75 mW 10 b 20 MSample/s CMOS subranging ADC with 59 dB SNDR

A CMOS 6 b 500 MSample/s ADC for a hard disk drive read channel

A 6 b 500 MSample/s CMOS flash ADC with a background interpolated auto-zeroing technique

Feedback charge-transfer comparator with zero static power

A single-chip universal digital satellite receiver with 480 MHz IF input

A single chip universal cable set-top box/modem transceiver

A digital television demodulator IC with 256 tap equalizer

A 4-channel diversity QAM receiver for broadband wireless communications

An all-digital IF GPS synchronizer for portable applications

A 755 Mb/s Viterbi decoder for the RM (64, 35, 8) subcode

A 250 MHz low jitter adaptive bandwidth PLL

A 0.155, 0.622, and 2.488 Gb/s automatic bit rate selecting clock and data recovery IC for bit rate transparent SDH-systems

An auto-ranging 50-210 Mb/s clock recovery circuit with a time-to-digital converter

A 0.5-3.5 Gb/s low-power low-jitter serial data CMOS transceiver

A 1 Gb/s CMOS clock and data recovery circuit

A 2-1600 MHz 1.2-2.5 V CMOS clock-recovery PLL with feedback phase-selection and averaging phase-interpolation for jitter reduction

Experience of IP-reuse in system-on-chip design for ADSL

Trends toward spatial computing architectures

A dynamically reconfigurable logic engine with a multi-context/multi-mode unified-cell architecture

The impact of technology evolution and scaling on electrostatic discharge (ESD) protection in high-pin count high-performance microprocessors

A fault-detecting 400 MHz floating-point unit for a massively-parallel computer

Access optimizer to overcome the "future walls of embedded DRAMs" in the era of systems on silicon

Picosecond imaging circuit analysis of the POWER3 clock distribution

Si bipolar 3.3 V transmitter/receiver IC chip set for 1 Gb/s 12-channel parallel optical interconnects

A 12-channel data-format-free 1 Gb/s/ch parallel optical receiver

A SiGe single-chip 3.3 V receiver IC for 10 Gb/s optical communication systems

A 60 dB gain 55 dB dynamic range 10 Gb/s broadband SiGe HBT limiting amplifier

High-bandwidth BiCMOS OEIC for optical storage systems

15 mW, 155 Mb/s CMOS burst-mode laser driver with automatic power control and end-of-life detection

Optical transceiver formed with fiber-embedded lightwave circuit on silicon substrate

A 450 kHz CMOS Gm-C bandpass filter with /spl plusmn/0.5% center frequency accuracy for on-chip PDC IF receivers

A 2.5 V, 30 MHz-100 MHz, 7th-order, equiripple group-delay continuous-time filter and variable-gain amplifier implemented in 0.25 /spl mu/m CMOS

A 2.5 Gb/s adaptive cable equalizer

A 13 mW 500 kHz data acquisition IC with 4.5 digit DC and 0.02% accurate true-RMS extraction

A 200 M sample/s 10 mW switched-capacitor filter in 0.5 /spl mu/m CMOS technology

A 2.6 GHz/5.2 GHz CMOS voltage-controlled oscillator

A 6.5 GHz monolithic CMOS voltage-controlled oscillator

A 9.8 GHz back-gate tuned VCO in 0.35 /spl mu/m CMOS

A 1.6 GB/s DRAM with flexible mapping redundancy technique and additional refresh scheme

A 2.5 V 333 Mb/s/pin 1 Gb double data rate SDRAM

A 800 MB/s 72 Mb SLDRAM with digitally-calibrated DLL

64 Mb 6.8 ns random ROW access DRAM macro for ASICs

A 250 Mb/s 1 Gb double data rate SDRAM with a bi-directional delay and an inter-bank shared redundancy scheme

A 12 ns 8 MB DRAM secondary cache for a 64 b microprocessor

A 390 mm/sup 2/ 16-bank 1 Gb DDR SDRAM with hybrid bitline architecture

Partially-depleted SOI technology for digital logic

SOI technology performance and modelling

A 580 MHz RISC microprocessor in SOI

A 0.25 /spl mu/m 600 MHz 1.5 V SOI 64 b ALPHA/sup TM/ microprocessor

Performance characteristics of SOI DRAM for low-power application

A SOI specific PLL for 1 GHz microprocessors in 0.25 /spl mu/m 1.8 V CMOS

A 0.2 /spl mu/m 1.8 V SOI 550 MHz 64 b PowerPC microprocesser with copper interconnects

A 1.8 mW CMOS /spl Sigma//spl Delta/ modulator with integrated mixer for A/D conversion of IF signals

1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156)

1997 IEEE International Solids-State Circuits Conference. Digest of Technical Papers

1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC

Proceedings ISSCC '95 - International Solid-State Circuits Conference

Proceedings of IEEE International Solid-State Circuits Conference - ISSCC '94

1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers

1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers

1991 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1990 37th IEEE International Conference on Solid-State Circuits

IEEE International Solid-State Circuits Conference, 1989 ISSCC. Digest of Technical Papers

1988 IEEE International Solid-State Circuits Conference, 1988 ISSCC. Digest of Technical Papers

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1985 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1983 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1981 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1980 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1979 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1978 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1977 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1976 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1975 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1974 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1973 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1972 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1971 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1970 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1969 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1968 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1967 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1966 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1965 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1964 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1963 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1962 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1961 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1960 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1959 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1958 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1957 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1956 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

1955 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

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