NDLI: An experimental 220 MHz 1 Gb DRAM

Content Provider	IEEE Xplore Digital Library
Author	Horiguchi, M. Sakata, T. Sekiguchi, T. Ueda, S. Tanaka, H. Yamasaki, E. Nakagome, Y. Aoki, M. Kaga, I. Ohkura, M. Nagai, R. Murai, F. Tanaka, T. Iijima, S. Yokoyama, N. Gotoh, Y. Shoji, K. Kisu, T. Yamashita, H. Nishida, T. Takeda, E.
Copyright Year	1995
Description	Author affiliation: Hitachi Ltd., Tokyo, Japan (Horiguchi, M.; Sakata, T.; Sekiguchi, T.; Ueda, S.; Tanaka, H.; Yamasaki, E.; Nakagome, Y.; Aoki, M.)
Abstract	With the arrival of the multimedia era, high-data-rate memory LSIs are becoming increasingly important to keep up with high-speed CPUs, graphics processors, and other consumers of stored data. Video editing and replaying of high-definition television in particular require a high bandwidth. This paper presents two circuit technologies for a synchronously operating high-data-rate 1 Gb DRAM: a distributed-column-control architecture reducing the burst-mode cycle time, and a ringing-canceling output buffer ensuring reliable high-speed data transfer.
Starting Page	252
Ending Page	253
File Size	1000179
Page Count	2
File Format	PDF
ISBN	0780324951
ISSN	01936530
DOI	10.1109/ISSCC.1995.535544
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1995-02-15
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Random access memory Timing Clocks Circuits Signal generators Latches Centralized control Wiring Delay effects Data engineering
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering Electronic, Optical and Magnetic Materials

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Mr. Siddhartha Mukherjee siddhartha@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	ndl-support@iitkgp.ac.in
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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