NDLI: International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.

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2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

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2010 International Conference on Simulation of Semiconductor Processes and Devices

2009 International Conference on Simulation of Semiconductor Processes and Devices

2008 International Conference on Simulation of Semiconductor Processes and Devices

2006 International Conference on Simulation of Semiconductor Processes and Devices

2005 International Conference On Simulation of Semiconductor Processes and Devices

International Conference on Simulation of Semiconductor Processes and Devices, 2003. SISPAD 2003.

2003 IEEE International Conference on Simulation of Semiconductor Processes and Devices (Cat. No.03TH8679)

Modeling and characterization of copper interconnects for SoC design

Experimental studies of dopant diffusion in strained Si and SiGe

Experimental study on carrier transport mechanism in ultrathin-body SOI MOSFETs

Quantum-dot cellular automata: an architecture for molecular computing

Microstructure development and evolution

CLIMATE (chip-level intertwined metal and active temperature estimator)

Scaling laws for the resistivity increase of sub-100 nm interconnects

Non-destructive inverse modeling of copper interconnect structure for 90nm technology node

Simple wide-band on-chip inductor model for silicon-based RF ICs

A novel technique for full-wave modeling of large-scale three-dimensional high-speed on/off-chip interconnect structures

Photoresist flow simulation using the viscous flow model

A new remote Coulomb scattering model for ultrathin oxide MOSFETs

Mobility in UTB-SOI PFETS: local coordinate-based modeling with the density gradient method

Substrate orientation-dependence of electron mobility in strained SiGe layers

Topography and Schottky contact models applied to NiSi SALICIDE process [MOSFET applications]

Reformulation of macroscopic transport models based on the moments of the scattering integral [semiconductor device modeling applications]

Analysis of gate currents through high-k dielectrics using a Monte Carlo device simulator [MOSFET applications]

Calibration of hole scattering rates in silicon with a large set of experimental data including high voltage quantum yield, drain disturb and substrate hole injection

The physical and numerical implications of the noise modeling method: IFM, CPM, and ERS

Thermal noise modeling for short-channel MOSFETs

Simulation of noise characteristics caused by discretized traps in MOSFETs

Hydrodynamic simulation of RF noise in deep-submicron MOSFETs

Random dopant fluctuation modelling with the impedance field method

Analysis of fluctuations in ultra-small semiconductor devices

Coupled atomistic 3D process/device simulation considering both line-edge roughness and random-discrete-dopant effects

Recent advances in sparse linear solver technology for semiconductor device simulation matrices

Error estimated driven anisotropic mesh refinement for three-dimensional diffusion simulation

Zero-flux boundary condition in a two-probability-parameter random walk model

On the inclusion of floating domains in electromagnetic field solvers

Detailed heat generation simulations via the Monte Carlo method

Investigation of thermal breakdown mechanism in 0. 13 /spl mu/m technology ggNMOS under ESD conditions

Simulation of number of pulses to breakdown during TLP for ESD testing

Characterization of Zener-tunneling drain leakage current in high-dose halo implants

Dopant diffusion under pressure and stress

Investigation of the detailed structure of atomically sharp Ge/SiO/sub 2/ interfaces

Ab-initio calculations to predict stress effects on defects and diffusion in silicon

Atomistic modeling of B activation and deactivation for ultra-shallow junction formation

Simulation of surface engineering for ultra shallow junction formation of PMOS for the 90nm CMOS technology node and beyond

Modeling the effect of source/drain sidewall spacer process on boron ultra shallow junctions

Electrostatic analysis of carbon nanotube arrays

Theory and design of field-effect carbon nanotube transistors

Comparison of numerical quantum device models

Energy dissipation in mesoscopic circuits

A FinFET design based on three-dimensional process and device simulations

Accurate transport modeling with 2D dopant profile effect in L/sub eff/ /spl sim/ 20 nm MOSFETs via inverse modeling

Optimization of sub-50 nm MOSFETs to mitigate drive current degradation due to silicon recess in S/D

Maximum drive current scaling properties of strained Si NMOS in the deca-nanometer regime

Computer aided design of sub-100 nm strained-Si/Si/sub 1-x/Ge/sub x/ NMOSFET through integrated process and device simulations

Device design of SiGe HBTs with low distortion characteristics using harmonic balance device simulator

Implications of gate design on RF performance of sub-100 nm strained-Si/SiGe nMODFETs

Grain boundary effects on subthreshold behaviour in single grain boundary nano-TFTs

Study on cell characteristics of PRAM using the phase-change simulation

Compact modeling of flash memory cells including substrate-bias-dependent hot-electron gate current

Simulation of the circuit performance impact of lithography in nanoscale semiconductor manufacturing

Physical compact model for threshold voltage in short-channel double-gate devices

Quantum surface potential model suitable for advanced MOSFETs simulation

An efficient method for frequency-domain simulation of short channel MOSFET including the non-quasistatic effect

Simulation of electronic control in electroosmotic flow channels

A new comprehensive SRAM soft-effor simulation based on 3D device simulation incorporating neutron nuclear reactions

A novel sub-20 nm depletion-mode double-gate (DMDG) FET

Accurate four-terminal RF MOSFET model accounting for the short-channel effect in the source-to-drain capacitance

Optimization of L/sub Gate/ for ggNMOS ESD protection devices fabricated on bulk- and SOI- substrates, using process and device simulation

Junction engineering and modeling for advanced CMOS technologies

A multistage smoothing algorithm for coupling cellular and polygonal datastructures

A numerically efficient method for the hydrodynamic density-gradient model

Simulation of 2D quantum transport in ultrashort DG-MOSFETs : a fast algorithm using subbands

Mobility modeling in presence of quantum effects

Resonance quantum switch: search of working parameters

Quantum corrected Boltzmann transport model for tunneling effects

Oxide breakdown model and its impact on SRAM cell functionality

An investigation of the electron tunneling leakage current through ultrathin oxides/high-k gate stacks at inversion conditions

Effects of gate-to-body tunneling current on PD/SOI CMOS latches

Modeling gate leakage in InAs/AlSb HEMTs

Simulation of nanofloating gate memory with high-k stacked dielectrics

Developing the structure of a Cu CMP model

Integrated multiscale multistep process simulation

Coupled modeling of time-dependent full-chip heating and quantum non-isothermal device operation

A new method for simulation of on-chip interconnects and substrate currents with 3D alternating-direction-implicit (ADI) Maxwell solver

Analysis and improvements of high frequency substrate losses for RF MOSFETs

Substrate resistance extraction using a multi-domain surface integral formulation

International Conferencre on Simulation of Semiconductor Processes and Devices

2000 International Conference on Simulation Semiconductor Processes and Devices (Cat. No.00TH8502)

1999 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD'99 (IEEE Cat. No.99TH8387)

SISPAD '97. 1997 International Conference on Simulation of Semiconductor Processes and Devices. Technical Digest

1996 International Conference on Simulation of Semiconductor Processes and Devices. SISPAD '96 (IEEE Cat. No.96TH8095)

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