NDLI: Design Space Exploration of DSP Applications Based on Behavioral Description Models

Content Provider	IEEE Xplore Digital Library
Author	Thabet, F. Coussy, P. Heller, D. Martin, E.
Copyright Year	2006
Description	Author affiliation: LESTER-CNRS, Univ. de Bretagne Sud (Thabet, F.; Coussy, P.; Heller, D.; Martin, E.)
Abstract	Exploring different communication architectures and timing behaviors is a key step in modern system design flows. This paper describes a behavioral description model (BDM) that allows design space exploration of DSP applications at different abstraction levels. The proposed approach consists in embedding a sequential function into a BDM object that includes a set of I/O and control processes. Communication architectures and timing behaviors (I/O scheduling, I/O parallelism...) can be varied and easily explored by adding I/O and control code into the dedicated concurrent processes while keeping the functionality description unchanged throughout the refinement steps. Although the proposed approach leads to slower simulations when compared to a rewrite of the specification for the desired I/O scheme, it allows much faster exploration because models do not have to be rewritten for every I/O scheme to be explored
Starting Page	244
Ending Page	249
File Size	8160922
Page Count	6
File Format	PDF
ISBN	1424403820
ISSN	15206130
DOI	10.1109/SIPS.2006.352589
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2006-10-02
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Space exploration Digital signal processing Mathematical model Timing High level synthesis Communication system control Decoding Time to market Modeling Hardware
Content Type	Text
Resource Type	Article

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