NDLI: The Instability of n-type LTPS TFTs Alternately operated in OFF region with drain biased

Content Provider	IEEE Xplore Digital Library
Author	Han-Wen Liu Si-Ming Chiou Fang-Hsing Wang
Copyright Year	2010
Description	Author affiliation: Dept. of Electrical Engineering and Institute of Electrical Engineering, and Graduate Institute of Optoelectric Engineering, National Chung Hsing University, No. 250, Kuo Kuang Rd., Taichung 402, Taiwan R.O.C. (Han-Wen Liu; Si-Ming Chiou; Fang-Hsing Wang)
Abstract	The instability characteristics of n-type low-temperature polycrystalline silicon thin-film transistors (LTPS TFTs) which are dynamically stressed in the OFF region with drain biased is investigated. Through the gate dynamically stressed in the OFF state with negative drain dc bias, the degradation mechanism of TFTs could be clarified and the defects are mainly generated in the source region. The higher the gate pulse frequency is, the more the TFTs devices degrade. A degradation model is proposed to explain the degradation mechanism of LTPS TFTs, according to three electrical measuring items, including the sampling currents, saturation forward & reverse I–V (FR-IV) transfer curves and C–V curves.
Starting Page	1
Ending Page	4
File Size	224567
Page Count	4
File Format	PDF
ISBN	9781424455966
ISSN	19461542
e-ISBN	9781424455980
DOI	10.1109/IPFA.2010.5532232
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-07-05
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Thin film transistors Degradation Stress Circuits Frequency Voltage Silicon Electrodes Transconductance PIN photodiodes
Content Type	Text
Resource Type	Article

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