NDLI: Author index

Please wait, while we are loading the content...

2015 International Conference on Field Programmable Technology (FPT)

2013 International Conference on Field-Programmable Technology (FPT)

2012 International Conference on Field-Programmable Technology

2011 International Conference on Field-Programmable Technology

2010 International Conference on Field-Programmable Technology

Table of contents

An FPGA architecture supporting dynamically controlled power gating

A tiled programmable fabric using QCA

Phase-change-memory-based storage elements for configurable logic

Dynamic reconfigurable bit-parallel architecture for large-scale regular expression matching

Impact of reconfigurable hardware on accelerating MPI_Reduce

Accelerating HMMER on FPGA using parallel prefixes and reductions

Multiple data set reduction on FPGAs

Accelerating FPGA development through the automatic parallel application of standard implementation tools

Parallelizing FPGA placement using Transactional Memory

A message-passing multi-softcore architecture on FPGA for Breadth-first Search

Deterministic multi-core parallel routing for FPGAs

The TransC process model and interprocess communication

Comparing performance and energy efficiency of FPGAs and GPUs for high productivity computing

Local-and-global stall mechanism for systolic computational-memory array on extensible multi-FPGA system

Floating-point exponential functions for DSP-enabled FPGAs

Modular design of fully pipelined accumulators

Efficient implementation of parallel BCD multiplication in LUT-6 FPGAs

High performance and memory efficient implementation of matrix multiplication on FPGAs

Fine-grained characterization of process variation in FPGAs

A stochastic method for security evaluation of cryptographic FPGA implementations

Fine-grain fault diagnosis for FPGA logic blocks

A robust reconfigurable logic device based on less configuration memory logic cell

Compact implementations of BLAKE-32 and BLAKE-64 on FPGA

Lightweight DPA resistant solution on FPGA to counteract power models

An FPGA-based text search engine for approximate regular expression matching

Real-time detection of line segments on FPGA

True random number generation in block memories of reconfigurable devices

Obstacle-free two-dimensional online-routing for run-time reconfigurable FPGA-based systems

The effect of multi-bit based connections on the area efficiency of FPGAs utilizing unidirectional routing resources

ATB: Area-Time response Balancing algorithm for scheduling real-time hardware tasks

Dynamic scheduling Monte-Carlo framework for multi-accelerator heterogeneous clusters

Multi-dimensional packet classification on FPGA: 100 Gbps and beyond

Automatic synthesis of processor arrays with local memories on FPGAs

GVE: Godson-T Verification Engine for many-core architecture rapid prototyping and debugging

Synthesis of a unified unit for evaluating an application-specific set of elementary functions

A compression method for inverted index and its FPGA-based decompression solution

FPGA implementation of GZIP compression and decompression for IDC services

Application-specific hardware accelerator for implementing recursive sorting algorithms

Towards an embedded biologically-inspired machine vision processor

Wireless sensors networks emulator implemented on a FPGA

A novel FPGA-based SVM classifier

High-throughput IP-lookup supporting dynamic routing tables using FPGA

A novel design flow for tamper-resistant self-healing properties of FPGA devices without configuration readback capability

A novel HDL coding style to reduce power consumption for reconfigurable devices

Wire congestion aware synthesis for a dynamically reconfigurable processor

A FPGA implementation of the two-dimensional Digital Huygens' Model

Reconfigurable Number Theoretic Transform architectures for cryptographic applications

An FPGA chip identification generator using configurable ring oscillator

FPGA implementation of an interior point solver for linear model predictive control

General switch box modeling and optimization for FPGA routing architectures

Efficient hardware task reuse and interrupt handling mechanisms for FPGA-based partially reconfigurable systems

A debugging method for repairing post-silicon bugs of high performance processors in the fields

Integration of PSoC technology with educational robotics

A graphical programming and design environment for FPGA-based hardware

Using partial reconfiguration and high-level models to accelerate FPGA design validation

FPGA-based video processing for a vision prosthesis

Reducing power consumption for Dynamically Reconfigurable Processor Array with Partially Fixed Configuration Mapping

Rapid prototyping tools for FPGA designs: RapidSmith

VMODEX: A visualization tool for multi-objective Design Space Exploration

Advanced partial run-time reconfiguration on Spartan-6 FPGAs

Mapping real-life applications on run-time reconfigurable NoC-based MPSoC on FPGA

Design space exploration for sparse matrix-matrix multiplication on FPGAs

Accelerating FPGA design space exploration using circuit similarity-based placement

Structured ASIC: Methodology and comparison

OpenPipes: Making distributed hardware systems easier

Design space exploration of instruction schedulers for out-of-order soft processors

An area-efficient dynamically reconfigurable Spatial Division Multiplexing network-on-chip with static throughput guarantee

A VLIW softcore processor with dynamically adjustable issue-slots

An FPGA implementation of full-search variable block size motion estimation

A multiported register file with register renaming for configurable softcore VLIW processors

A configurable framework for investigating workload execution

Performance estimation framework for FPGA-based processors

Evaluation of FPGA design guardband caused by inhomogeneous NBTI degradation considering process variations

Efficient implementation of greyscale morphological filters

A many processing element framework for the Discrete Fourier Transform

Acceleration of control flow on CGRA using advanced predicated execution

Efficient implementation of CIOQ switches with sequential iterative matching algorithms

On identifying and optimizing instruction sequences for dynamic compilation

A datapath classification method for FPGA-based scientific application accelerator systems

Efficient custom instructions generation for system-level design

Histogram-based probability density function estimation on FPGAs

A parallel FPGA design of the Smith-Waterman traceback

Routing optimizations for component-based system design and partial run-time reconfiguration on FPGAs

Solving Sudokus through an incidence matrix on an FPGA

GE3: A single FPGA client-server architecture for Golomb Ruler derivation

An FPGA-based scalable platform for high-speed malware collection in large IP networks

FPGA based soft-core SIMD processing: A MIMO-OFDM Fixed-Complexity Sphere Decoder case study

A deeply pipelined and parallel architecture for denoising medical images

SEU tolerant SRAM for FPGA applications

Convex models for accelerating applications on FPGA-based clusters

A 64-context MEMS optically reconfigurable gate array

Minimalistic architecture for reconfigurable audio Beamforming

FPGA implementation of a strong Reversi player

Othello Solver based on a soft-core MIMD processor array

CarlOthello : An FPGA-Based Monte Carlo Othello player

Reconfigurable computing - evolution of Von Neumann architecture

FPGA platforms leading the way in the application of ‘more than Moore's’ technology

Bringing FPGA design to application domain experts

Technology issues facing the world's largest integrated circuits

In search for better silicon and human efficiency

2009 International Conference on Field-Programmable Technology

2008 International Conference on Field-Programmable Technology

2007 International Conference on Field-Programmable Technology

2006 IEEE International Conference on Field Programmable Technology

Proceedings. 2005 IEEE International Conference on Field-Programmable Technology, 2005.

Proceedings. 2004 IEEE International Conference on Field- Programmable Technology (IEEE Cat. No.04EX921)

Proceedings. 2003 IEEE International Conference on Field-Programmable Technology (FPT) (IEEE Cat. No.03EX798)

2002 IEEE International Conference on Field-Programmable Technology, 2002. (FPT). Proceedings.

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in