NDLI: VLSI implementation of the universal 2-D CAT/ICAT system

Content Provider	IEEE Xplore Digital Library
Author	Rong-Jian Chen Jui-Lin Lai
Copyright Year	2004
Description	Author affiliation: Dept. of Electron. Eng., Nat. United Univ., Miao-Li, Taiwan (Rong-Jian Chen; Jui-Lin Lai)
Abstract	The VLSI implementation of the universal two-dimensional (2D) cellular automata transform (CAT) as well as inverse CAT (ICAT) is present in this paper. The universal 2D CAT/ICAT chip is based on the 2D CAB generator. To facilitate the development of a universal 2D CAB generator, we adopted a CA cell structure with programmable additive rules to generate 1D CAB first, and then utilized the canonical products of 2D CAB to perform the 2D CAB. We have accomplished simulations of the universal 2D 8/spl times/8 CAT/ICAT chip by using CANDENCE tools. We also have completed the circuit synthesis of the 2D CAT/ICAT chip by using the SYNOPSE tools with the TSMC 0.35 /spl mu/m CMOS data-path cell-library. The maximum operation frequency was 120 MHz, and the area size was 6.8225 mm/sup 2/. It shows that the architecture of the proposed universal 2D CAT/ICAT is suitable for VLSI realization.
Starting Page	187
Ending Page	190
File Size	756553
Page Count	4
File Format	PDF
ISBN	0780387155
DOI	10.1109/ICECS.2004.1399646
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-12-15
Publisher Place	Israel
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Very large scale integration Fourier transforms Additives Wavelet transforms Solid modeling Predictive models Two dimensional displays Circuit simulation Circuit synthesis Frequency
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Mr. Siddhartha Mukherjee siddhartha@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	ndl-support@iitkgp.ac.in
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7	National Digital Libarray of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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