NDLI: High frequency CMOS Gm-C bandpass filter with automatic on-chip tuning

Content Provider	IEEE Xplore Digital Library
Author	Elhallabi, H. Fouzar, Y. Sawan, M.
Copyright Year	2001
Description	Author affiliation: Dept. of Electr. & Comput. Eng., PolySTIM Neurotechnology Lab., Montreal, Que., Canada (Elhallabi, H.)
Abstract	A fourth-order CMOS transconductance-C (Gm-C) bandpass filter with on-chip automatic frequency tuning for wireless receiver filtering applications is proposed. A linearized transconductance (Gm) cell is designed and optimized for phase error cancellation. The center frequency of the filter is locked to an external reference frequency using an Adaptive Gain Phase-Locked Loop (AGPLL). The purpose of the AGPLL technique is to provide a short locking time which is under 50 clock cycles, it decreases the filter time response. The power supply of the proposed design is 2.2 volts and the whole circuit has been implemented in 0.35 um CMOS technology available through the Canadian Microelectronics Corporation (CMC).
Sponsorship	IEEE CAS Soc. Univ. Malta
Starting Page	823
Ending Page	826
File Size	333284
Page Count	4
File Format	PDF
ISBN	0780370570
DOI	10.1109/ICECS.2001.957601
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2001-09-02
Publisher Place	Malta
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Band pass filters CMOS technology Automatic frequency control Tuning Filtering Transconductance Design optimization Adaptive filters Phase locked loops Clocks
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Mr. Siddhartha Mukherjee siddhartha@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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