NDLI: Fault-tolerant CAM architectures: a design framework

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Fault-tolerant CAM architectures: a design framework

Content Provider	IEEE Xplore Digital Library
Author	Salice, F. Sami, M.G. Stefanelli, R.
Copyright Year	2002
Description	Author affiliation: DEI, Politecnico di Milano, Italy (Salice, F.; Sami, M.G.; Stefanelli, R.)
Abstract	Presents a novel design framework for designing fault tolerant/self-checking content addressable memories (CAM). The proposed methodology produces a CAM structural architecture starting from a functional description of some high level properties of the device (design directives). The analysis focuses on the functional level; in particular, the paper concentrates on functional level synthesis, by considering the transformation from the functional description to the structural definition. Some examples will be provided as support to the description.
Starting Page	233
Ending Page	241
File Size	435943
Page Count	9
File Format	PDF
ISBN	0769518311
ISSN	15505774
DOI	10.1109/DFTVS.2002.1173520
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2002-11-06
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Fault tolerance Computer aided manufacturing CADCAM Circuit faults Pattern matching Fault detection Flip-flops Design methodology Network synthesis Fault diagnosis
Content Type	Text
Resource Type	Article

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