NDLI: NiSi contact formation - process integration advantages with partial Ni conversion

Content Provider	IEEE Xplore Digital Library
Author	Funk, K. Pages, X. Kuznetsov, V.I. Granneman, E.H.A.
Copyright Year	2004
Description	Author affiliation: ASM Eur., Almere (Funk, K.)
Abstract	Investigations for next generation contacts of silicon and SiGe devices show that a 2-step nickel salicidation process is favorable over a single step NiSi and over $CoSi_{2}$ in every respect and can be introduced easily in existing and advanced not fully depleted CMOS flows once the post silicidation thermal treatments can be kept below 700degC. Partial conversion for the deposited Ni layer to Ni2 Si in a first RTP1 step at temperatures as low as 250degC avoids the reverse linewidth effect and enables superior uniformities over complete conversion. A second RTP2 step at typically 450degC is used to form low resistivity NiSi with less silicon consumption and lower contact resistivities than today's $CoSi_{2}$ contacts. Challenging integration issue are peripheral leakage currents, that are likely to be related to undesired low temperature pyramidal NiSi2 formation and spiking
Starting Page	94
Ending Page	98
File Size	637312
Page Count	5
File Format	PDF
ISBN	0780384776
DOI	10.1109/RTP.2004.1441942
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2004-09-28
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Temperature Silicon Conductivity Nickel Silicidation Leakage current CMOS logic circuits Contact resistance CMOS technology Scalability
Content Type	Text
Resource Type	Article

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