NDLI: 2012 IEEE 30th International Conference on Computer Design (ICCD)

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2012 IEEE 30th International Conference on Computer Design (ICCD)

Table of contents

Welcome to ICCD 2012!

Cloud computing: Virtualization and resiliency for data center computing

FlexRAM: Toward an advanced Intelligent Memory system: A retrospective paper

FlexRAM: Toward an advanced Intelligent Memory system

Retrospective on “Power-Sensitive Multithreaded Architecture”

Power-sensitive multithreaded architecture

Architectural impact of secure socket layer on Internet servers: A retrospect

Architectural impact of secure socket layer on Internet servers

Exploiting microarchitectural redundancy for defect tolerance

A retrospective look at xpipes: The exciting ride from a design experience to a design platform for nanoscale networks-on-chip

Xpipes: A latency insensitive parameterized network-on-chip architecture for multi-processor SoCs

Task model suitable for dynamic load balancing of real-time applications in NoC-based MPSoCs

BIXBAR: A low cost solution to support dynamic link reconfiguration in networks on chip

Exploiting multi-level scratchpad memories for time-predictable multicore computing

SECRET: Selective error correction for refresh energy reduction in DRAMs

DuSCA: A multi-channeling strategy for doubling communication capacity in wireless NoC

Reinforcement learning based dynamic power management with a hybrid power supply

A PRET microarchitecture implementation with repeatable timing and competitive performance

Flash correct-and-refresh: Retention-aware error management for increased flash memory lifetime

A high-performance, low-overhead microarchitecture for secure program execution

Robust optimization of a Chip Multiprocessor's performance under power and thermal constraints

Hierarchical modeling of Phase Change memory for reliable design

Clock mesh synthesis method using the Earth Mover's Distance under transformations

Malicious key emission via hardware Trojan against encryption system

Exposing vulnerabilities of untrusted computing platforms

A physical unclonable function based on setup time violation

Stealth assessment of hardware Trojans in a microcontroller

Design and evaluation of a delay-based FPGA Physically Unclonable Function

Adaptable intrusion detection using partial runtime reconfiguration

Timing aware partitioning for multi-FPGA based logic simulation using top-down selective hierarchy flattening

Maximizing crosstalk-induced slowdown during path delay test

Embedded way prediction for last-level caches

Thermal characterization of cloud workloads on a power-efficient server-on-chip

RFiop: RF-memory path to address on-package I/O pad and memory controller scalability

Design methodology for sample preparation on digital microfluidic biochips

An efficient arithmetic Sum-of-Product (SOP) based multiplication approach for FIR filters and DFT

Multi-voltage domain clock mesh design

Acceleration of Monte-Carlo molecular simulations on hybrid computing architectures

Understanding variance propagation in stochastic computing systems

Parametric throughput analysis of scenario-aware dataflow graphs

A polynomial time flow for implementing free-choice Petri-nets

A flexible structure of standard cell and its optimization method for near-threshold voltage operation

WaveSync: A low-latency source synchronous bypass network-on-chip architecture

HPRA: A pro-active Hotspot-Preventive high-performance routing algorithm for Networks-on-Chips

Phase-based passive stereovision systems dedicated to cortical visual stimulators

Interface design for synthesized structural hybrid microarchitectural simulators

A comparative study of wearout mechanisms in state-of-art microprocessors

Mamba: A scalable communication centric multi-threaded processor architecture

Dynamic phase-based tuning for embedded systems using phase distance mapping

SOLE: Speculative one-cycle load execution with scalability, high-performance and energy-efficiency

Analyzing the optimal ratio of SRAM banks in hybrid caches

A stochastic reconfigurable architecture for fault-tolerant computation with sequential logic

Enhancing 3T DRAMs for SRAM replacement under 10nm tri-gate SOI FinFETs

A spectral transform approach to stochastic circuits

Fast error aware model for arithmetic and logic circuits

Designing pipelined delay lines with dynamically-adaptive granularity for low-energy applications

Row buffer locality aware caching policies for hybrid memories

Mitigating NBTI in the physical register file through stress prediction

An efficient reliability simulation flow for evaluating the hot carrier injection effect in CMOS VLSI circuits

Memory module-level testing and error behaviors for phase change memory

CoNA: Dynamic application mapping for congestion reduction in many-core systems

DIPLOMA: Consistent and coherent shared memory over mobile phones

Aurora: A thermally resilient photonic network-on-chip architecture

Improving inclusive cache performance with two-level eviction priority

Fast development of hardware-based run-time monitors through architecture framework and high-level synthesis

Parameterized free space redistribution for engineering change in placement of integrated circuits

Providing cost-effective on-chip network bandwidth in GPGPUs

3D-NoC: Reconfigurable 3D photonic on-chip interconnect for multicores

Adaptive Backpressure: Efficient buffer management for on-chip networks

Oblivious routing design for mesh networks to achieve a new worst-case throughput bound

A novel profiled side-channel attack in presence of high Algorithmic Noise

Architecture and design flow for a debug event distribution interconnect

MSE minimization and fault-tolerant data fusion for multi-sensor systems

Locating faults in application-dependent interconnects of SRAM based FPGAs

Timing-test scheduling for constraint-graph based post-silicon skew tuning

Adaptive memory architecture for real-time image warping

A novel variation-tolerant 4T-DRAM cell with enhanced soft-error tolerance

Engineering crossbar based emerging memory technologies

Protecting pipelined asynchronous communication channels against single event upsets

Architectural simulations of a fast, source-synchronous ring-based Network-on-Chip design

A case for small row buffers in non-volatile main memories

Energy modelling of embedded multimedia streaming applications with GStreamer on heterogeneous MPSoC

Efficient code compression for coarse grained reconfigurable architectures

Integration of correct-by-construction BIP models into the MetroII design space exploration flow

The performance of hypermesh NoCs in FPGAs

Distributed thermal-aware task scheduling for 3D Network-on-Chip

System level modeling of real-time embedded software

A 3D stacked high performance scalable architecture for 3D Fourier Transform

Design and evaluation of a four-port data cache for high instruction level parallelism reconfigurable processors

Dynamic warp resizing: Analysis and benefits in high-performance SIMT

Post-layout OPE-predicted redundant wire insertion for clock skew minimization

Track assignment considering crosstalk-induced performance degradation

DOC: Fast and accurate congestion analysis for global routing

Efficient verification of out-of-order behaviors with relaxed scoreboards

ECC string: Flexible ECC management for low-cost error protection of L2 caches

Non-enumerative generation of statistical path delays for ATPG

Modeling economics of LSI design and manufacturing for test design selection

Balancing performance and fault detection for GPGPU workloads

Ring oscillator physical unclonable function with multi level supply voltages

Automatic assertion extraction in gate-level simulation using GPGPUs

2011 IEEE 29th International Conference on Computer Design (ICCD)

2010 IEEE International Conference on Computer Design

2009 IEEE International Conference on Computer Design

2008 IEEE International Conference on Computer Design

2007 25th International Conference on Computer Design

2006 International Conference on Computer Design

2005 International Conference on Computer Design

IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings.

Proceedings 21st International Conference on Computer Design

Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors

Proceedings 2001 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2001

Proceedings 2000 International Conference on Computer Design

Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040)

Proceedings International Conference on Computer Design. VLSI in Computers and Processors (Cat. No.98CB36273)

Proceedings International Conference on Computer Design VLSI in Computers and Processors

Proceedings International Conference on Computer Design. VLSI in Computers and Processors

Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors

Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors

Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93

Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors

[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors

Proceedings., 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors

Proceedings 1989 IEEE International Conference on Computer Design: VLSI in Computers and Processors

Proceedings 1988 IEEE International Conference on Computer Design: VLSI

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