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Author Lenders, P. M. ♦ Schröder, H. ♦ Strazdins, P.
Source ACM Digital Library
Content type Text
Publisher Association for Computing Machinery (ACM)
File Format PDF
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Abstract The instruction systolic array (ISA) is a programmable parallel architecture suitable for VLSI implementation. This paper presents a generalization of the ISA, called the microprogrammed ISA, which uses simple microprogramming techniques. Microprogrammed ISAs use dynamic microcodes whose length and contents are tailor made to the current program to be executed, and this can be efficiently implemented in VLSI. Here, microprogramming has the novel advantage of extending the range of algorithms that can be implemented on a given ISA. In particular, microprogramming can extend an ISA's effective communication abilities. Also, the reduction of the program input bandwidth (and pinout) afforded by microprogramming is even more important on large-scale MIMD architectures, such as the ISA. This paper also presents a weakest precondition semantics for the (microprogrammed) ISA model, which provides a means for verifying microprogrammed ISA programs. The semantics is modeled at the micro level, and has potential in the optimization of the microcodes of ISA programs.
Description Affiliation: Computer Science Laboratory, Australian National University, Canberra, ACT 2601, Australia (Lenders, P. M.; Schröder, H.; Strazdins, P.)
Age Range 18 to 22 years ♦ above 22 year
Educational Use Research
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1978-03-01
Publisher Place New York
Journal ACM SIGMICRO Newsletter (SIGM)
Volume Number 20
Issue Number 3
Page Count 14
Starting Page 56
Ending Page 69


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Source: ACM Digital Library