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Author Gannon, Dennis ♦ Atapattu, Daya ♦ Bodin, François ♦ Windheiser, Daniel ♦ Lee, Mannho ♦ Jalby, William
Source ACM Digital Library
Content type Text
Publisher Association for Computing Machinery (ACM)
File Format PDF
Language English
Subject Domain (in DDC) Computer science, information & general works ♦ Data processing & computer science
Abstract The techniques of “load/store” memory reference modeling is based on deriving performance characteristics of the memory architecture of a computer by looking at the behavior of simple sequences of load, store and nop (null operation) instructions. The resulting data base can be used to match load/store templates against algorithm kernels to predict performance or as a source of data for testing analytical models of the architecture. In this paper we study the BBN GP1000 parallel processing system. We show how to build a subset of the load/store kernels needed to characterize the machine and illustrate the behavior of a simple model based on the data.
Description Affiliation: Indiana University, IRISA Rennes and INRIA France (Bodin, François; Windheiser, Daniel; Jalby, William) || Department of Computer Science, Indiana University (Atapattu, Daya; Lee, Mannho; Gannon, Dennis)
Age Range 18 to 22 years ♦ above 22 year
Educational Use Research
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1981-04-01
Publisher Place New York
Journal ACM SIGARCH Computer Architecture News (CARN)
Volume Number 18
Issue Number 3b
Page Count 13
Starting Page 401
Ending Page 413

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Source: ACM Digital Library