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Author Kumar, Arvind ♦ Mondal, Sandip ♦ Rao, K. S. R. Koteswara
Source United States Department of Energy Office of Scientific and Technical Information
Content type Text
Language English
Subject Keyword CONDENSED MATTER PHYSICS, SUPERCONDUCTIVITY AND SUPERFLUIDITY ♦ CAPACITANCE ♦ COMPARATIVE EVALUATIONS ♦ GRAIN SIZE ♦ LEAKAGE CURRENT ♦ MHZ RANGE ♦ PERMITTIVITY ♦ P-TYPE CONDUCTORS ♦ ROUGHNESS ♦ SILICON ♦ SOL-GEL PROCESS ♦ SPIN-ON COATING ♦ SUBSTRATES ♦ SURFACES ♦ THIN FILMS ♦ TITANIUM OXIDES ♦ TRAPPING
Abstract High-k TiO{sub 2} thin film on p-type silicon substrate was fabricated by a combined sol-gel and spin coating method. Thus deposited titania film had anatase phase with a small grain size of 16 nm and surface roughness of ≅ 0.6 nm. The oxide capacitance (C{sub ox}), flat band capacitance (C{sub FB}), flat band voltage (V{sub FB}), oxide trapped charge (Q{sub ot}), calculated from the high frequency (1 MHz) C-V curve were 0.47 nF, 0.16 nF, − 0.91 V, 4.7x10{sup −12} C, respectively. As compared to the previous reports, a high dielectric constant of 94 at 1 MHz frequency was observed in the devices investigated here and an equivalent oxide thickness (EOT) was 4.1 nm. Dispersion in accumulation capacitance shows a linear relationship with AC frequencies. Leakage current density was found in acceptable limits (2.1e-5 A/cm{sup 2} for −1 V and 5.7e-7 A/cm{sup 2} for +1 V) for CMOS applications.
ISSN 0094243X
Educational Use Research
Learning Resource Type Article
Publisher Date 2015-06-24
Publisher Place United States
Volume Number 1665
Issue Number 1


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