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Author Keezer, D.C. ♦ Gray, C. ♦ Majid, A. ♦ Minier, D. ♦ Ducharme, P.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2009
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Electronic equipment testing ♦ Automatic testing ♦ Hardware ♦ Assembly ♦ Aggregates ♦ Field programmable gate arrays ♦ Costs ♦ Silicon germanium ♦ Germanium silicon alloys ♦ Indium phosphide
Abstract An adaptable platform for the development of customized ATE and test-support modules is described. The purpose of the platform is to provide a hardware framework for assembling combinations of specialized test modules for applications that are not well addressed by conventional general-purpose ATE alone. The platform can also be used to test, characterize, and calibrate individual modules prior to use within either a platform-based application or within a traditional ATE environment. The paper describes some of the salient features of the platform and one completed example for an all-optical packet-switching network called “Data Vortex” operating at 2.5Gbps on each of 18 channels (≫40Gbps aggregate burst data rate). Two other example modules demonstrate even higher data rates. One is a dual-channel, bidirectional 5Gbps FPGA-based module with loopback, jitter-injection, and 2:1 XOR multiplexing (up to 10Gbps). This module exploits recent advances in FPGA technology that enable very high data rates at relatively low cost. Another example module synthesizes two 10Gbps data streams using 16:1 SiGe serializers; and then combines these using an InP XOR gate to form a 20Gbps test stimulus channel. While the platform and modules have interesting characteristics, individually they do not form a complete solution. However the various possible combinations, together with special-purpose modules, may help solve some of the most difficult test applications in the near future. Therefore, this paper tries to present the key features in a way that the reader may extrapolate to future test challenges.
Description Author affiliation: Georgia Institute of Technology, Atlanta, USA (Keezer, D.C.; Gray, C.; Majid, A.) || IBM, Bromont, Canada (Minier, D.; Ducharme, P.)
ISBN 9781424448685
ISSN 10893539
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2009-11-01
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 2.98 MB
Page Count 11
Starting Page 1
Ending Page 11

Source: IEEE Xplore Digital Library