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Author Ting Yu ♦ Wong, M.D.F.
Sponsorship IEEE Circuits Syst. Soc.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2014
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations
Subject Keyword Power grids ♦ Optimization ♦ Transient analysis ♦ System-on-chip ♦ Voltage control ♦ SPICE ♦ Switches
Abstract IR-drop values of power grid can be reduced through inserting on-chip low-dropout voltage regulators (LDO). In this paper, we explore the optimization of LDOs to meet the IR-drop constraint, where the maximum IR-drop value is less than 10% of power supply. With Cholesky direct solver and SPICE, we propose a method to simulate power grid with LDOs. Based on the simulation method, we develop an efficient flow to optimize the number and locations of the LDOs. Effectiveness of the proposed method is verified by the experimental results. To the best of our knowledge, this is the first work optimizing the number and locations of LDOs to meet the IR-drop constraint.
Description Author affiliation: Dept. of ECE, Univ. of Illinois at Urbana-Champaign, Urbana, IL, USA (Ting Yu; Wong, M.D.F.)
ISBN 9781479928163
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2014-01-20
Publisher Place Singapore
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 455.78 kB
Page Count 6
Starting Page 531
Ending Page 536


Source: IEEE Xplore Digital Library