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Author Dimond, R. ♦ Mencer, O. ♦ Luk, W.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2006
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Resource management ♦ Hardware ♦ Application specific processors ♦ Computer aided instruction ♦ Energy consumption ♦ Application software ♦ Educational institutions ♦ Arithmetic ♦ Logic ♦ Cryptography
Abstract We propose a novel methodology to generate application specific instruction processors (ASIPs) including custom instructions. Our implementation balances performance and area requirements by making custom instructions reusable across similar pieces of code. In addition to arithmetic and logic operations, table look-ups within custom instructions reduce costly accesses to global memory. We present synthesis and cycle-accurate simulation results for six embedded benchmarks running on customised processors. Reusable custom instructions achieve an average 319% speedup with only 5% additional area. The maximum speedup of 501% for the advanced encryption standard (AES) requires only 3.6% additional area
Description Author affiliation: Dept. of Comput., Imperial Coll., London (Dimond, R.; Mencer, O.; Luk, W.)
ISBN 3981080114
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2006-03-06
Publisher Place Germany
Rights Holder European Design Automation Association (EDAA)
Size (in Bytes) 210.64 kB
Page Count 6
Starting Page 1
Ending Page 6


Source: IEEE Xplore Digital Library