Thumbnail
Access Restriction
Subscribed

Author Wang, N. ♦ Yao, X. ♦ Lei, Y. ♦ Feng, G.Y. ♦ Dong, Q.H. ♦ Xu, L. ♦ Guo, L. ♦ Wang, Z. ♦ Tang, T.S.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2008
Language English
Subject Domain (in DDC) Natural sciences & mathematics ♦ Physics ♦ Electricity & electronics ♦ Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword SONOS devices ♦ Flash memory ♦ Calibration ♦ Voltage ♦ Decoding ♦ Logic ♦ Smart cards ♦ Temperature sensors ♦ Driver circuits ♦ National electric code
Abstract A 1 Mb embedded 2T-SONOS Flash macro is implemented in 0.13 um logic compatible process. The Flash macro has improved reliability and yield with a power-on Successive Approximated Read Calibration (SARC). Word-line decoder area is greatly reduced using 1.8 V transistors to tolerate high voltage. Source degenerated compensation is implemented to enhance read margin. The Flash macro consumes 1.0 mA at 50 ns 1.8 V access and 0.5 uA in standby mode, and achieves one million cycling and 20-year data retention.
Description Author affiliation: Shanghai Hua Hong NEC Electron. Co., Ltd., Shanghai (Wang, N.; Yao, X.; Lei, Y.; Feng, G.Y.; Dong, Q.H.; Xu, L.; Guo, L.; Wang, Z.; Tang, T.S.)
ISBN 9781424420186
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2008-09-21
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Size (in Bytes) 534.54 kB
Page Count 4
Starting Page 427
Ending Page 430


Source: IEEE Xplore Digital Library