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Author Van Wagenen, B. ♦ Seng, E.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2010
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Planning ♦ Concurrent computing ♦ Testing ♦ Pins ♦ Resource management ♦ Complexity theory ♦ Computers
Abstract Testing multiple device functions in parallel can yield significant test time and cost of test reductions. This paper discusses the planning process and algorithms required to realize an efficient and achievable concurrent test plan.
Description Author affiliation: Teradyne, Inc., North Reading, MA, USA (Van Wagenen, B.; Seng, E.)
ISBN 9781424472062
ISSN 10893539
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2010-11-02
Publisher Place USA
Rights Holder Institute of Electrical and Electronics Engineers, Inc. (IEEE)
e-ISBN 9781424472079
Size (in Bytes) 377.47 kB
Page Count 10
Starting Page 1
Ending Page 10

Source: IEEE Xplore Digital Library