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Author McGeer, P.C. ♦ Brayton, R.K.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©1989
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations
Subject Keyword Computer networks ♦ Intelligent networks ♦ Timing ♦ Delay ♦ Circuits ♦ Search methods ♦ Adders ♦ Boolean functions ♦ Acceleration ♦ Detection algorithms
Abstract We consider the elimination of false paths in combinational circuits. We give the single generic algorithm that is used to solve this problem, and demonstrate that it is parameterized by a boolean function called the sensitization condition. We give two criteria which we argue that a valid sensitization condition must meet, and introduce four conditions that have appeared in the recent literature, of which two meet the criteria and two do not. We then introduce a dynamic programming procedure for the tightest of these conditions, the viability condition, and discuss the integration of all four sensitization conditions in the LLLAMA timing environment. We give results on the IWLS and ISCAS benchmark examples and on carry-bypass adders.
Description Author affiliation: Department of Electrical Engineering and Computer Sciences, University of California, Berkeley (McGeer, P.C.)
ISBN 0897913108
ISSN 0738100X
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 1989-06-25
Publisher Place USA
Rights Holder Association for Computing Machinery, Inc. (ACM)
Size (in Bytes) 885.11 kB
Page Count 7
Starting Page 561
Ending Page 567


Source: IEEE Xplore Digital Library