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Author Ho Fai Ko ♦ Nicolici, N.
Source IEEE Xplore Digital Library
Content type Text
Publisher Institute of Electrical and Electronics Engineers, Inc. (IEEE)
File Format PDF
Copyright Year ©2008
Language English
Subject Domain (in DDC) Technology ♦ Engineering & allied operations ♦ Applied physics
Subject Keyword Signal processing ♦ Signal restoration ♦ Observability ♦ Computer bugs ♦ Silicon ♦ System-on-a-chip ♦ Design for disassembly ♦ Signal design ♦ Circuit simulation ♦ Virtual manufacturing
Abstract Embedded logic analysis has emerged as a powerful technique for identifying functional bugs during post-silicon validation, as it enables at-speed acquisition of data from the circuit nodes in real-time. Nonetheless, the amount of data that is observed is limited by the capacity of the on-chip trace buffers. This paper introduces an automated method for improving the utilization of the on-chip storage, by identifying a small set of trace signals from which a large number of states can be restored using a compute-efficient algorithm. This enlarged set of data can then be used to aid the search of functional bugs in the fabricated circuit.
Description Author affiliation: Dept. of Electr. & Comput. Eng., McMaster Univ., Hamilton, ON (Ho Fai Ko; Nicolici, N.)
ISBN 9783981080131
Educational Role Student ♦ Teacher
Age Range above 22 year
Educational Use Research ♦ Reading
Education Level UG and PG
Learning Resource Type Article
Publisher Date 2008-03-10
Publisher Place Germany
Rights Holder European Design Automation Association (EDAA)
Size (in Bytes) 336.15 kB
Page Count 6
Starting Page 1298
Ending Page 1303

Source: IEEE Xplore Digital Library